The Community for Technology Leaders
Great Lakes Symposium on VLSI (1997)
Urbana, IL
Mar. 13, 1997 to Mar. 15, 1997
ISSN: 1066-1395
ISBN: 0-8186-7904-2
TABLE OF CONTENTS

Reviewers (PDF)

pp. xii
Session 1A: Physical Design

A 1.4 Gbit/s CMOS driver for 50 /spl Omega/ ECL systems (Abstract)

W.A.M. Van Noije , Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil
F.L. Romao , Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil
J. Navarro, Jr. , Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil
R. Silveira , Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil
pp. 14
Session 1B: Testing I

On Generating Test Sets that Remain Valid in the Presence of Undetected Faults (Abstract)

Irith Pomeranz , Electrical and Computer Engineering Department University of Iowa
Sudhakar M. Reddy , Electrical and Computer Engineering Department University of Iowa
pp. 20
Session 2A: Synthesis and Verification

Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables (Abstract)

Hiroshi Sawada , NTT Communication Science Laboratories
Shigeru Yamashita , NTT Communication Science Laboratories
Akira Nagoya , NTT Communication Science Laboratories
pp. 39

OLIVIA: Objectoriented Logicsimulation Implementing the VITAL Standard (Abstract)

Josef Fleischmann , Technical University of Munich
Rolf Schlagenhaft , Technical University of Munich
Martin Peller , Technical University of Munich
Norbert Froehlich , Technical University of Munich
pp. 51
Session 2B: High-Level Design Methodologies

Hardware interface design for real time embedded systems (Abstract)

E. Martin , Lester Lab., Lorient, France
A. Baganne , Lester Lab., Lorient, France
J.L. Philippe , Lester Lab., Lorient, France
pp. 58

Accurate Entropy Calculation for Large Logic Circuits Based on Output Clustering (Abstract)

Massimo Poncino , Politecnico di Torino
Enrico Macii , Politecnico di Torino
Massimo Rossello , Politecnico di Torino
Antonio Lioy , Politecnico di Torino
pp. 70
Session 3A: Low-Power Design

Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems (Abstract)

Enrico Macii , Politecnico di Torino
Luca Benini , Stanford University
Giovanni de Micheli , Stanford University
Cristina Silvano , Universita` di Brescia
Donatella Sciuto , Politecnico di Milano
pp. 77

A New Low-Voltage Full Adder Circuit (Abstract)

Gerald E. Sobelman , University of Minnesota
Hanho Lee , University of Minnesota
pp. 88
Session 3B: VLSI Architecture I

VLSI Architectures for Programmable Sorting of Analog Quantities with Multiple-Chip Support (Abstract)

G. Uneddu , DIBE - Dept. of Biophysical and Electronic Eng. University of Genoa
R. Zunino , DIBE - Dept. of Biophysical and Electronic Eng. University of Genoa
S Rovetta , DIBE - Dept. of Biophysical and Electronic Eng. University of Genoa
G . Oddone , DIBE - Dept. of Biophysical and Electronic Eng. University of Genoa
F. Ancona , DIBE - Dept. of Biophysical and Electronic Eng. University of Genoa
pp. 94

A new method for asynchronous pipeline control (Abstract)

S.S. Appleton , Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
M.J. Liebelt , Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
S.V. Morton , Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
pp. 100

The MGAP Family of Processor Arrays (Abstract)

Kevin Acken , The Pennsylvania State University
Tom Kelliher , The Pennsylvania State University
Eric Gayles , The Pennsylvania State University
Robert Owens , The Pennsylvania State University
Mary Jane Irwin , The Pennsylvania State University
pp. 105
Session 4A: Testing II

An Efficient Dynamic Parallel Approach to Automatic Test Pattern Generation (Abstract)

U. Glaeser , The German National Research Center for Information Technology (GMD)
H. T. Vierhaus , The German National Research Center for Information Technology (GMD)
H. Dahmen , The German National Research Center for Information Technology (GMD)
pp. 112

How an "Evolving" Fault Model Improves the Behavioral Test Generation (Abstract)

F. Fummi , Politecnico di Milano
L. Ferrandi , Politecnico di Milano
D. Sciuto , Politecnico di Milano
G. Buonanno , Politecnico di Milano
F. Ferrandi , Politecnico di Milano
pp. 124
Session 4B: Applications

A prototype chipset for a large scaleable ATM switching node (Abstract)

M. Weeks , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
M. Bayoumi , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
P. Shipley , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
M.B. Maaz , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
H. Krishnamurthy , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
pp. 131

A New CMOS Tunable Transconductor Dedicated to VHF Continuous-Time Filters (Abstract)

Rabin Raut , Ecole Polytechnique de Montreal
Ali Assi , Ecole Polytechnique de Montreal
Mohamad Sawan , Ecole Polytechnique de Montreal
pp. 143
Session 5A: High-Level Synthesis

Scheduling with Confidence for Probabilistic Data-flow Graphs (Abstract)

Nelson L. Passos , Midwestern State University
Chantana Chantrapornchai , University of Notre Dame
Edwin H.-M Sha , University of Notre Dame
Sissades Tongsima , University of Notre Dame
pp. 150

A low power based system partitioning and binding technique for multi-chip module architectures (Abstract)

R.V. Cherabuddi , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
H. Krishnamurthy , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
M.A. Bayoumi , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
pp. 156

Algorithm and Hardware Support for Branch Anticipation (Abstract)

Roy Dz-ching Ju , Hewlett-Packard Company
Edwin H.-M. Sha , University of Notre Dame
Nelson Passos , Midwestern State University
Ted Zhihong Yu , University of Notre Dame
pp. 163
Session 5B: VLSI Architecture II

Parallel VLSI Architectures for Cryptographic Systems (Abstract)

Rodolfo Zunino , DIBE - University of Genoa
Fabio Ancona , DIBE - University of Genoa
Alessandro de Gloria , DIBE - University of Genoa
pp. 176

A Clocked, Static Circuit Technique for Building Efficient High Frequency Pipelines (Abstract)

Kevin Acken , Penn State University
Robert Owens , The Pennsylvania State University
Eric Gayles , The Pennsylvania State University
Kevin Acken , The Pennsylvania State University
Mary Jane Irwin , The Pennsylvania State University
pp. 182

Index of Authors (PDF)

pp. 189
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