Proceedings of the Second Great Lakes Symposium on VLSI (1992)
Kalamazoo, MI, USA
Feb. 28, 1992 to Feb. 29, 1992
A.D. Jovanovic , Dept. of Electr. Eng., Toledo Univ., OH, USA
Y.Y. Yeng , Dept. of Electr. Eng., Toledo Univ., OH, USA
Presents a router which is an O(n) computational complexity deterministic implementation of recent theoretical results. Theory shows that a net can have more than one minimum wiring length routing. An obvious application of the rules is in critical net routing where main objectives are minimization of the wiring length, and the number of vias. Those objectives are usually met by prerouting critical nets before other signal nets, which then find prerouted wires as obstacles in the channel. Multiplicity of available optimal routings translates into flexibility of obstacles. Partitioning of a multi terminal net into flexible and non-flexible subnets provides a kind of computer vision for obstacle flexibility. Router is implemented in five modules, basic interactive module, net partitioning module, automatic and interactive initial routers, and the modification router. Examples of applications are included.<
circuit layout CAD, computational complexity
A. Jovanovic and Y. Yeng, "Interactive optimal channel router for critical nets," Proceedings of the Second Great Lakes Symposium on VLSI(GLSV), Kalamazoo, MI, USA, , pp. 84-90.