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Proceedings of the Second Great Lakes Symposium on VLSI (1992)
Kalamazoo, MI, USA
Feb. 28, 1992 to Feb. 29, 1992
ISBN: 0-8186-2610-0
pp: 168-175
J. Greenbaum , Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
F. Brewer , Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
ABSTRACT
The authors propose a novel specification for tightly constrained processing elements based on recognizing concurrent sequences of data flow. This specification has several benefits, notably it allows a very concise representation of complex internal semantics and interface protocols. Particular advantages exist with specifying timing constraints and performance cost functions for control dominated applications. The specification can be made canonical and leads to an interesting formulation of the scheduling problem.<>
INDEX TERMS
formal specification, protocols, scheduling, specification languages
CITATION

J. Greenbaum and F. Brewer, "Interface constrained processor specification and scheduling," Proceedings of the Second Great Lakes Symposium on VLSI(GLSV), Kalamazoo, MI, USA, , pp. 168-175.
doi:10.1109/GLSV.1992.218349
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