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Fault-Tolerant Computing, International Symposium on (1995)
Pasadena, California
June 27, 1995 to June 30, 1995
ISBN: 0-8186-7079-7
pp: 0340
P. Thadikaran , Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
S. Chakravarty , Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
J. Patel , Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
ABSTRACT
Abstract: The notion of indistinguishable pairs is introduced. Two methods to compute such pairs-an explicit scheme and an implicit scheme-are presented. The resulting fault simulation algorithms, list-based scheme and tree-based scheme are compared using a variety of faultlists and test sets. The performance of the tree-based scheme is found to be superior to the list-based scheme. Applications where the list-based scheme perform better are discussed.
INDEX TERMS
logic testing; sequential circuits; fault diagnosis; list processing; fault trees; digital simulation; circuit analysis computing; I/sub DDQ/ tests; fault simulation; bridging faults; sequential circuits; indistinguishable pairs; explicit scheme; implicit scheme; fault simulation algorithms; list-based scheme; tree-based scheme; faultlists; test sets
CITATION

S. Chakravarty, J. Patel and P. Thadikaran, "Fault Simulation of IDDQ Tests for Bridging Faults in Sequential Circuits," Fault-Tolerant Computing, International Symposium on(FTCS), Pasadena, California, 1995, pp. 0340.
doi:10.1109/FTCS.1995.466965
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