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6th Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1965) (1965)
Ann Arbor, MI
Oct. 6, 1965 to Oct. 8, 1965
pp: 179-190
ABSTRACT
This paper investigates the computational complexity of binary sequences as measured by the rapidity of their generation by multitape Turing machines. A "translational" method which escapes some of the limitations of earlier approaches leads to a refinement of the established hierarchy. The previous complexity classes are shown to possess certain translational properties. An related hierarchy of complexity classes of monotonic functions is examined
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CITATION

P. M. Lewis, R. E. Stearns and J. Hartmanis, "Hierarchies of memory limited computations," 6th Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1965)(FOCS), Ann Arbor, MI, 1965, pp. 179-190.
doi:10.1109/FOCS.1965.11
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