The Community for Technology Leaders
Frontiers of Information Technology (2011)
Islamabad, Pakistan
Dec. 19, 2011 to Dec. 21, 2011
ISBN: 978-0-7695-4625-4
pp: 99-105
ABSTRACT
Operating system plays a major role in effective memory management and has a significant impact on the performance of applications. In a Chip Multiprocessor, the on-chip memory hierarchy is an important resource that plays a significant role in determining the overall performance of an application. In addition to a number of hardware optimization techniques that work for all types of applications, some software controlled optimization techniques are also effective for improving the performance of on-chip memory hierarchy. This is so because the software controlled techniques generally have a global view of other concurrently running workloads. A better solution to the memory performance problem is to couple the operating system policies and mechanisms to the hardware techniques for management of on-chip memory hierarchy and its optimizations. This paper gives an overview of all such designs that have coupled the on-chip cache optimization techniques with the operating system mechanisms and policies. More techniques are suggested that would be investigated to predict their effectiveness.
INDEX TERMS
Cache optimizations, chip multiprocessors, operating system, prefetcher, victim cache
CITATION
Hasina Khatoon, Talat Altaf, Shahid Hafeez Mirza, "Operating System-Aware Cache Optimization Techniques for Multi Core Processors", Frontiers of Information Technology, vol. 00, no. , pp. 99-105, 2011, doi:10.1109/FIT.2011.26
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