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2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) (2016)
Washington, DC, USA
May 1, 2016 to May 3, 2016
ISBN: 978-1-5090-2357-8
pp: 29
ABSTRACT
FPGA-enabled datacenters have shown great potential for providing performance and energy efficiency improvement, and captured a great amount of attention from both academia and industry. In this paper we aim to answer one key question: how can we efficiently integrate FPGAs into state-of-the-art big-data computing frameworks? Although very important, this problem has not been well studied, especially for the integration of fine-grained FPGA accelerators that have short execution time but will be invoked many times. To provide a generalized methodology and insight for efficient integration, we conduct an in-depth analysis of challenges and corresponding solutions of integration at single-thread, single-node multi-thread, and multi-node levels. With a step-by-step case study for the next-generation DNA sequencing application, we demonstrate how a straightforward integration with 1000x slowdown can be tuned into an efficient integration with 2.6x overall system speedup and 2.4x energy efficiency improvement.
INDEX TERMS
Field programmable gate arrays, Sparks, Acceleration, Instruction sets, Sequential analysis, Kernel, Next generation networking
CITATION

Y. Chen, J. Cong, Z. Fang, J. Lei and P. Wei, "When Spark Meets FPGAs: A Case Study for Next-Generation DNA Sequencing Acceleration," 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Washington, DC, USA, 2016, pp. 29.
doi:10.1109/FCCM.2016.18
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