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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on (2006)
Napa, California
Apr. 24, 2006 to Apr. 26, 2006
ISBN: 0-7695-2661-6
pp: 309-310
Gayatri Mehta , University of Pittsburgh
Raymond R. Hoare , University of Pittsburgh
Justin Stander , University of Pittsburgh
Alex K. Jones , University of Pittsburgh
ABSTRACT
Hardware acceleration using Field Programmable Gate Arrays (FPGAs) has become increasingly popular for computationally intensive Digital Signal Processing (DSP) applications. Unfortunately, while FPGAs have a reasonably tractable Computer Aided Design (CAD) flow and performance, they have poor power characteristics when compared to direct Application Specific Integrated Circuit (ASIC) fabrication. ASICs exhibit better performance and power than FPGAs, but require complex CAD and large Non-Recurring Engineering (NRE) costs.
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CITATION

A. K. Jones, G. Mehta, R. R. Hoare and J. Stander, "A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture," 2006 14th Annual IEEE Symposium on Field Programmable Custom Computing Machines(FCCM), Napa, CA, 2006, pp. 309-310.
doi:10.1109/FCCM.2006.9
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