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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on (2006)
Napa, California
Apr. 24, 2006 to Apr. 26, 2006
ISBN: 0-7695-2661-6
pp: 45-56
David Lau , Altera Santa Cruz
Orion Pritchard , Altera Santa Cruz
Philippe Molson , Altera Santa Cruz
<p>Methodologies for synthesis of stand-alone hardware modules from C/C++ based languages have been gaining adoption for embedded system design, as an essential means to stay ahead of increasing performance, complexity, and time-to-market demands. However, using C to generate stand-alone blocks does not allow for truly seamless unification of embedded software and hardware development flows.</p> <p>This paper describes a methodology for generating hardware accelerator modules that are tightly coupled with a soft RISC CPU, its tool chain, and its memory system. This coupling allows for several significant advancements: (1) a unified development environment with true pushbutton switching between original software and hardwareaccelerated implementations, (2) direct access to memory from the accelerator module, (3) full support for pointers and arrays, and (4) latency-aware pipelining of memory transactions.</p> <p>We also present results of our implementation, the C2H Compiler. Eight user test cases on common embedded applications show speedup factors of 13x-73x achieved in less than a few days.</p>

D. Lau, P. Molson and O. Pritchard, "Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions," 2006 14th Annual IEEE Symposium on Field Programmable Custom Computing Machines(FCCM), Napa, CA, 2006, pp. 45-56.
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