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Field-Programmable Custom Computing Machines, Annual IEEE Symposium on (2002)
Napa, California
Sept. 22, 2002 to Sept. 24, 2002
ISSN: 1082-3409
ISBN: 0-7695-1801-X
pp: 152
Herman Schmit , Carnegie Mellon University
Benjamin Levine , Carnegie Mellon University
Benjamin Ylvisaker , Carnegie Mellon University
ABSTRACT
In this paper, we hypothesize that reconfigurable computing is not more widely used because of the logistical difficulties caused by the close coupling of applications and hardware platforms. As an alternative, we propose computing machines that use a single, serial instruction representation for the entire reconfigurable computing application. We show how it is possible to convert, at run-time, the parallel portions of the application into a spatial representation suitable for execution on a reconfigurable fabric. The conversion to spatial representation is facilitated by the use of an instruction set architecture based on an operand queue. We describe techniques to generate code for queue machines and hardware virtualization techniques necessary to allow any application to execute on any platform.
INDEX TERMS
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CITATION

B. Levine, B. Ylvisaker and H. Schmit, "Queue Machines: Hardware Compilation in Hardware," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on(FCCM), Napa, California, 2002, pp. 152.
doi:10.1109/FPGA.2002.1106670
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