The Community for Technology Leaders
East-West Design & Test Symposium (2008)
Lviv Ukraine
Oct. 9, 2008 to Oct. 12, 2008
ISBN: 978-1-4244-3402-2
TABLE OF CONTENTS

[Title page] (PDF)

pp. 1

Testing the control part of peripheral interfaces (PDF)

S. Zielski , Institute of Computer Science, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665, Poland
J. Sosnowski , Institute of Computer Science, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665, Poland
pp. 55-58

Concurrent processes synchronisation in statecharts for FPGA implementation (PDF)

Grzegorz Labiak , Computer Engineering & Electronics Department, University of Zielona Góra, Podgórna 50, 65-246, Poland
Marian Adamski , Computer Engineering & Electronics Department, University of Zielona Góra, Podgórna 50, 65-246, Poland
pp. 59-64

Characterization of CMOS sequential standard cells for defect based voltage testing (PDF)

A. Wielgus , Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
W. A. Pleskacz , Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
pp. 49-54

An advanced method for synthesizing TLM2-based interfaces (PDF)

Nadereh Hatami , Electrical and Computer Engineering School, University of Tehran, Iran
Zainalabedin Navabi , Electrical and Computer Engineering School, University of Tehran, Iran
pp. 104-108

Coverage-directed verification of microprocessor units based on cycle-accurate contract specifications (PDF)

Alexander Kamkin , Software Engineering Department, Institute for System Programming of Russian Academy of Sciences, 25, B. Kommunisticheskaya, Moscow, 109004, Russia
pp. 84-87

Multidimensional loop fusion for low-power (PDF)

Dmytro Lazorenko , G.E. Pukhov Institute for Modeling in Energy Engineering, National Academy of Sciences of Ukraine, 15 General Naumov Street, Kyiv, 03164, Ukraine
pp. 92-95

On macroplaces in Petri nets (PDF)

Andrei Karatkevich , University of Zielona Góra, Institute of Computer Engineering and Electronics, ul. Podgórna 50, 65-246, Poland
pp. 418-422

A novel timing-driven placement algorithm using smooth timing analysis (PDF)

Andrey Ayupov , Strategic CAD Labs, Intel Corp., USA
Leonid Kraginskiy , Strategic CAD Labs, Intel Corp., USA
pp. 137-140

RTL-TLM equivalence checking based on simulation (PDF)

Nicola Bombieri , Department of Computer Science, University Verona, Italy
Franco Fummi , Department of Computer Science, University Verona, Italy
Graziano Pravadelli , Department of Computer Science, University Verona, Italy
pp. 214-217

An optimized CLP-based technique for generating propagation sequences (PDF)

F. Fummi , Dipartimento di Informatica - Università di Verona, Strada le Grazie 15, 37134, Italy
V. Guarnieri , Dipartimento di Informatica - Università di Verona, Strada le Grazie 15, 37134, Italy
C. Marconcini , Dipartimento di Informatica - Università di Verona, Strada le Grazie 15, 37134, Italy
G. Pravadelli , Dipartimento di Informatica - Università di Verona, Strada le Grazie 15, 37134, Italy
pp. 25-29

Digital lock detector for PLL (PDF)

Vazgen Melikyan , Synopsys Armenia CJSC, USA
Aristakes Hovsepyan , Synopsys Armenia CJSC, USA
Mkrtich Ishkhanyan , Synopsys Armenia CJSC, USA
Tigran Hakobyan , Synopsys Armenia CJSC, USA
pp. 141-142

Partitioning, floor planning, detailed placement and routing techniques for schematic generation of analog netlist (PDF)

Bikram Garg , Mentor Graphics, India
Ashish Agrawal , Mentor Graphics, India
Rajeev Sehgal , Mentor Graphics, India
Amarpal Singh , Mentor Graphics, India
Manish Khanna , Mentor Graphics, India
pp. 379-382

Test suite consistency verification (PDF)

Sergiy Boroday , Centre de recherche informatique de Montreal (CRIM), Canada
Alexandre Petrenko , Centre de recherche informatique de Montreal (CRIM), Canada
Andreas Ulrich , Siemens AG, USA
pp. 235-239

Testability analysis method for hardware and software based on assertion libraries (PDF)

Maryna Kaminska , Kharkov National University of Radioelectronics, Lenin ave, 14, 61200, Ukraine
Roman Prikhodchenko , Kharkov National University of Radioelectronics, Lenin ave, 14, 61200, Ukraine
Artem Kubirya , Kharkov National University of Radioelectronics, Lenin ave, 14, 61200, Ukraine
Pavel Mocar , Kharkov National University of Radioelectronics, Lenin ave, 14, 61200, Ukraine
pp. 163-167

Utilizing HDL simulation engines for accelerating design and test processes (PDF)

Najmeh Farajipour , CAD Research Group, School of ECE, Faculty of Engineering - Campus #2 - University of Tehran, IRAN
S. Behdad Hosseini , CAD Research Group, School of ECE, Faculty of Engineering - Campus #2 - University of Tehran, IRAN
Zainalabedin Navabi , CAD Research Group, School of ECE, Faculty of Engineering - Campus #2 - University of Tehran, IRAN
pp. 371-375

Diagnosis of SoC faulty memory cells for embedded repair (PDF)

Vladimir Hahanov , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Eugenia Litvinova , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Karina Krasnoyaruzhskaya , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Sergey Galagan , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
pp. 143-148

An IEEE 1500 compatible wrapper architecture for testing cores at transaction level (PDF)

Fatemeh Refan , CAD Research Group, ECE Department, University of Tehran, 14399, Iran
Paolo Prinetto , Dipartimento di Automatica e Informatica, Politecnico di Torino, I-10129, Italy
Zainalabedin Navabi , CAD Research Group, ECE Department, University of Tehran, 14399, Iran
pp. 178-181

Reliable NoC architecture utilizing a robust rerouting algorithm (PDF)

Armin Alaghi , Electrical and Computer Engineering Department, University of Tehran, Iran
Mahshid Sedghi , Electrical and Computer Engineering Department, University of Tehran, Iran
Naghmeh Karimi , Computer Engineering Department Iran University of Science and Technology, Iran
Mahmood Fathy , Electrical and Computer Engineering Department, University of Tehran, Iran
Zainalabedin Navabi , Electrical and Computer Engineering Department, University of Tehran, Iran
pp. 200-203

Automating Hardware/Software partitioning using dependency Graph (PDF)

Somayeh Malekshahi , Department of Electrical and Computer Engineering, University of Tehran, Iran
Mahshid Sedghi , Department of Electrical and Computer Engineering, University of Tehran, Iran
Zainalabedin Navabi , Department of Electrical and Computer Engineering, University of Tehran, Iran
pp. 196-199

System level hardware design and simulation with SystemAda (PDF)

Negin Mahani , Electrical and Computer Engineering Department, Faculty of Engineering, Campus #2, University of Tehran, 14399, IRAN
Parnian Mokri , Electrical and Computer Engineering Department, Faculty of Engineering, Campus #2, University of Tehran, 14399, IRAN
Zainalabedin Navabi , Electrical and Computer Engineering Department, Faculty of Engineering, Campus #2, University of Tehran, 14399, IRAN
pp. 190-193

HotSpot : Visualizing dynamic power consumption in RTL designs (PDF)

T. English , Dept of Microelectronic Engineering, University College Cork (UCC), Ireland
K.L. Man , Centre for Efficiency-Oriented Languages (CEOL), University College Cork (UCC), Ireland
E. Popovici , Dept of Microelectronic Engineering, University College Cork (UCC), Ireland
M.P. Schellekens , Centre for Efficiency-Oriented Languages (CEOL), University College Cork (UCC), Ireland
pp. 45-48

Performance evaluation of In-Circuit Testing on QCA based circuits (PDF)

Nasim Kazemi-fard , School of Electrical and Computer Eng., Shahid Beheshti University, Tehran, Iran
Maryam Ebrahimpour , School of Electrical and Computer Eng., Shahid Beheshti University, Tehran, Iran
Mostafa Rahimi , School of Electrical and Computer Eng., Shahid Beheshti University, Tehran, Iran
Mohammad Tehrani , School of Electrical and Computer Eng., Shahid Beheshti University, Tehran, Iran
Keivan Navi , School of Electrical and Computer Eng., Shahid Beheshti University, Tehran, Iran
pp. 375-378

SoC software components diagnosis technology (PDF)

Svetlana Chumachenko , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Wajeb Gharibi , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Anna Hahanova , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Aleksey Sushanov , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
pp. 155-158

Vector-logical diagnosis method for SOC functionalities (PDF)

Vladimir Hahanov , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Olesya Guz , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Natalya Kulbakova , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
Maxim Davydov , Computer Engineering Faculty, Kharkov National University of Radioelectronics, Lenin Ave. 14, Ukraine, 61166
pp. 159-162

Parity prediction method for on-line testing of a Barrel-shifter (PDF)

A. Drozd , Department of Computers, Odessa National Polytechnic University, Department of Electrical and Computer Engineering, University of New Hampshire, USA
S. Antoshchuk , Department of Computers, Odessa National Polytechnic University, Department of Electrical and Computer Engineering, University of New Hampshire, USA
A. Rucinski , Department of Computers, Odessa National Polytechnic University, Department of Electrical and Computer Engineering, University of New Hampshire, USA
A. Martinuk , Department of Computers, Odessa National Polytechnic University, Department of Electrical and Computer Engineering, University of New Hampshire, USA
pp. 208-215
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