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EUROMICRO Conference (1997)
Budapest, HUNGARY
Sept. 1, 1997 to Sept. 4, 1997
ISSN: 1089-6503
ISBN: 0-8186-8129-2
pp: 653
Mario Porrmann , Heinz Nixdorf Institut University of Paderborn
Ulrich Rueckert , Heinz Nixdorf Institut University of Paderborn
Karl Michael Marks , Heinz Nixdorf Institut University of Paderborn
Joerg Landmann , Heinz Nixdorf Institut University of Paderborn
ABSTRACT
This paper describes the architecture and development of an innovative memory controller for the PowerPC family. HiBRIC-MEM (High Bandwidth Resource Interface Controller) provides control for up to two PowerPC processors. A look-ahead mechanism, called stream cache, is used to reduce the effective memory latency and a 12-bit error correction code is available for optimal system security. Initial silicon was produced in a 0.7 mm, three metal layer Motorola technology and has a die size of 12.1=A0x=A012.1=A0sqmm. HiBRIC-MEM is used e.g. in a commercially available parallel computer.
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CITATION

K. M. Marks, U. Rueckert, M. Porrmann and J. Landmann, "HiBRIC-MEM, a Memory Controller for PowerPC Based Systems," EUROMICRO Conference(EUROMICRO), Budapest, HUNGARY, 1997, pp. 653.
doi:10.1109/EURMIC.1997.617396
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