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Prague, Czech Republic
Sept. 2, 1996 to Sept. 5, 1996
ISBN: 0-8186-7487-3
pp: 0202
C. Siegelin , Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France
C. O'Donnell , Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France
U. Finger , Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France
ABSTRACT
Abstract: This paper introduces a new approach to the implementation of event-driven multiprocessor simulators. Cache and memory behaviour is modelled through finite state machines which use a very limited amount of storage rather than a full execution context (CPU registers, stack). The resulting simulator design is conceptually simple and clean. Furthermore, we make the point that finite state machines can be scheduled faster. Our performance figures show that simulation overhead is lower than for comparable multiprocessor simulators.
INDEX TERMS
finite state machines; simulation; multiprocessors; finite state machines; event-driven multiprocessor simulators; memory behaviour; cache behaviour
CITATION
C. Siegelin, C. O'Donnell, U. Finger, "Efficient Simulation of Multiprocessors through Finite State Machines", EUROMICRO, 1996, EUROMICRO Conference, EUROMICRO Conference 1996, pp. 0202, doi:10.1109/EURMIC.1996.546383
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