The Community for Technology Leaders
European Test Workshop, IEEE (1999)
Stuttgart, Germany
Sept. 24, 1999 to Sept. 27, 1999
ISSN: 1530-1877
ISBN: 0-7695-0390-X

Foreword (PDF)

pp. viii

ETW '99 Chairs (PDF)

pp. ix
BIST: From Basics to Application

A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures (Abstract)

A. Benso , Politecnico di Torino
S. Cataldo , Politecnico di Torino
S. Chiusano , Politecnico di Torino
P. Prinetto , Politecnico di Torino
Y. Zorian , LogicVision
pp. 2

On Calculating Efficient LFSR Seeds for Built-In Self Test (Abstract)

C. Fagot , Universit? Montpellier II / CNRS
O. Gascuel , Universit? Montpellier II / CNRS
P. Girard , Universit? Montpellier II / CNRS
C. Landrault , Universit? Montpellier II / CNRS
pp. 7

On Random Pattern Testability of Cryptographic VLSI Cores (Abstract)

A. Schubert , University of Bremen
W. Anheier , University of Bremen
pp. 15
Functional and Structural Testing of Analog Circuits

Functional and Structural Testing of Switched-Current Circuits (Abstract)

M. Renovell , University of Montpellier
F. Azaïs , University of Montpellier
J-C. Bodin , University of Montpellier
Y. Bertrand , University of Montpellier
pp. 22

Practical Implementation of Defect-Oriented Testing for a Mixed-Signal Class-D Amplifier (Abstract)

R.H. Beurze , University of Twente
R.J.W.T. Tangelder , University of Twente
N. Engin , University of Twente
Y. Xing , Philips Semiconductors
R. Van Kleef , Philips Semiconductors
pp. 28
IDDx Testing

Experimental Results on BIC Sensors for Transient Current Testing (Abstract)

R. Picos , University of the Balearic Islands
M. Roca , University of the Balearic Islands
E. Isern , University of the Balearic Islands
J. Segura , University of the Balearic Islands
E. García-Moreno , University of the Balearic Islands
pp. 46
Testing MEMs and Switched Capacitors

A DFT for Semi-DC Fault Diagnosis for Switched-Capacitor Circuits (Abstract)

Sheng-Jer Kuo , National Chiao Tung University
Chung Len Lee , National Chiao Tung University
Soon-Jyh Chang , National Chiao Tung University
Jwu E. Chen , Chung-Hua Polytechnic Institute
pp. 58

Extending Fault-Based Testing to Microelectromechanical Systems (Abstract)

Salvador Mir , TIMA Laboratory
Benoit Charlot , TIMA Laboratory
Bernard Courtois , TIMA Laboratory
pp. 64
Industrial Experiences and Challenges

The Role of Test Protocols in Testing Embedded-Core-Based System ICs (Abstract)

Erik Jan Marinissen , Philips Research Laboratories
Maurice Lousberg , Philips Electronic Design & Tools
pp. 70

Debug Facilities in the TriMedia CPU64 Architecture (Abstract)

Harald Vranken , Philips Research Laboratories
pp. 76
ATPG and Fault Modeling

High-Level Path Activation Technique to Speed Up Sequential Circuit Test Generation (Abstract)

Jaan Raik , Tallinn Technical University
Raimund Ubar , Tallinn Technical University
pp. 84

On Avoiding Undetectable Faults During Test Generation (Abstract)

Irith Pomeranz , University of Iowa
Sudhakar M. Reddy , University of Iowa
pp. 90
BIST for Sequential Circuits and Delay Faults

A Scalable BIST Architecture for Delay Faults (Abstract)

Martin Keim , Albert-Ludwigs-University
Ilia Polian , Albert-Ludwigs-University
Harry Hengster , Albert-Ludwigs-University
Bernd Becker , Albert-Ludwigs-University
pp. 98

Deterministic BIST with Partial Scan (Abstract)

Gundolf Kiefer , University of Stuttgart
Hans-Joachim Wunderlich , University of Stuttgart
pp. 110
Fault Simulation and Fault Coverage of Analog Circuits

On Maximizing the Coverage of Catastrophic and Parametric Faults (Abstract)

Anna M. Brosa , Universitat Politecnica de Catalunya
Joan Figueras , Universitat Politecnica de Catalunya
pp. 123
From System Level to Defect Oriented Test

From System Level to Defect-Oriented Test: A Case Study (Abstract)

J. Semião , Universidade do Algarve
M.B. Santos , Universidade T?cnica de Lisboa
I.M. Teixeira , Universidade T?cnica de Lisboa
J.P. Teixeira , Universidade T?cnica de Lisboa
pp. 136
Testing FPGAs and Regular Arrays

Design of an Automatic Testing for FPGAs (Abstract)

Abderrahim Doumar , Chiba University
Toshiaki Ohmameuda , Chiba University
Hideo Ito , Chiba University
pp. 152
Low Power BIST

A New BIST Architecture for Low Power Circuits (Abstract)

F. Corno , Politenico di Torino
M. Rebaudengo , Politenico di Torino
M. Sonza Reorda , Politenico di Torino
M. Violante , Politenico di Torino
pp. 160

Author Index (PDF)

pp. 171
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