2013 18th IEEE European Test Symposium (ETS) (2011)
May 23, 2011 to May 27, 2011
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ETS.2011.59
We propose using logic implications as a source of online diagnostic data for on-chip test set selection by taking advantage of their ability to automatically identify a restricted set of faults as the potential cause of an observed error. This information will be used to dynamically choose a test set to detect systematic latent defects or wear out in a multi core system.
Logic Implications, on-chip diagnosis, test set selection
Y. Shi, N. Imbriglia, N. Alves, K. Nepal, R.I. Bahar, J. Dworak, "Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis", 2013 18th IEEE European Test Symposium (ETS), vol. 00, no. , pp. 211, 2011, doi:10.1109/ETS.2011.59