The Community for Technology Leaders
European Design and Test Conference (1996)
Paris, FRANCE
Mar. 11, 1996 to Mar. 14, 1996
ISSN: 1066-1409
ISBN: 0-8186-7423-7
pp: 508
Vivek Garg , Georgia Institute of Technology
Steve Lacy , Georgia Institute of Technology
David E. Schimmel , Georgia Institute of Technology
Darrell Stogner , Georgia Institute of Technology
Craig Ulmer , Georgia Institute of Technology
D. Scott Wills , Georgia Institute of Technology
Sudhakar Yalamanchili , Georgia Institute of Technology
ABSTRACT
Computer system design addresses the optimization of metrics such as cost, performance, power, and reliability in the presence of physical constraints. The advent of large area, low cost Multi-Chip Modules (MCM) will lead to a new class of optimal system designs. This paper explores the early analysis of the impact of packaging technology on this design process. Our goal is to develop a suite of tools to evaluate computing system architectures under the constraints of various technologies. The design of the memory hierarchy in high speed microprocessors is used to explore the nature and type of trade-offs that can be made during the conceptual design of computing systems.
INDEX TERMS
Packaging, MCM, Multichip Module, System Design, Packaging Models, Architectural Evaluation, Early Analysis, Microprocessors, Caches
CITATION

D. S. Wills et al., "Incorporating Multi-Chip Module Packaging Constraints into System Design," European Design and Test Conference(EDTC), Paris, FRANCE, 1996, pp. 508.
doi:10.1109/EDTC.1996.494348
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