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Dependable Systems and Networks Workshops (2011)
Hong Kong, China
June 27, 2011 to June 30, 2011
ISBN: 978-1-4577-0374-4
pp: 223-227
Christof Fetzer , Dresden University of Technology, Dresden, Germany
Pascal Felber , University of Neuchâtel Neuchâtel, Switzerland
Transactional Memory (TM) has been touted as one of the most promising approaches to concurrent programming for multi-core processors. By combining ease of use with high scalability potential, as well as checkpointing capabilities particularly useful for developing dependable software, TM has attracted considerable attention from the research community. Many of its facets have been studied over the last few years: hardware support, software TM runtimes, operating system extensions, transactional compilers, language extensions, or application workloads. On the basis of our experiences as designers and users of a complete TM stack that we developed over the last five years, we discuss in this position paper our view on the challenges one faces when extending TM to dependable embedded systems. Indeed, there is an apparent contradiction between the optimistic, best-effort operation of TM and the strict dependability requirements of embedded systems. Our position is that it is both possible and worthwhile to develop embedded transactional memory. Yet, we believe that in the context of dependable embedded systems the focus of TM should be on failure control and not concurrency control. Hence, this will require modifications of the TM language primitives, tools, algorithms, runtime systems, and hardware itself.

P. Felber and C. Fetzer, "Transactional memory for dependable embedded systems," Dependable Systems and Networks Workshops(DSNW), Hong Kong, China, 2011, pp. 223-227.
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