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2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) (2018)
Luxembourg City, Luxembourg
Jun 25, 2018 to Jun 28, 2018
ISSN: 2158-3927
ISBN: 978-1-5386-5596-2
pp: 330-337
ABSTRACT
To improve power efficiency, researchers are experimenting with dynamically adjusting the voltage and frequency margins of systems to just above the minimum required for reliable operation. Traditionally, manufacturers did not allow reducing these margins. Consequently, existing studies use system simulators, or software fault-injection methodologies, which are slow, inaccurate and cannot be applied on realistic workloads. However recent CPUs allow the operation outside the nominal voltage/frequency envelope. We present eXtended Margins eXperiment Manager (XM2) which enables the evaluation of software on systems operating outside their nominal margins. It supports both bare-metal and OS-controlled execution using an API to control the fault injection procedure and provides automatic management of experimental campaigns. XM2 requires, on average, 5.6% extra lines of code and increases the application execution time by 2.5%. To demonstrate the flexibility of XM2, we perform three case studies: two employing bare-metal execution on a raspberry PI, and one featuring a full-fledged software stack (including OS) on an Intel Skylake Xeon processor.
INDEX TERMS
operating systems (computers), power aware computing, software fault tolerance
CITATION

K. Parasyris, P. Koutsovasilis, V. Vassiliadis, C. D. Antonopoulos, N. Bellas and S. Lalis, "A Framework for Evaluating Software on Reduced Margins Hardware," 2018 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Luxembourg City, Luxembourg, 2018, pp. 330-337.
doi:10.1109/DSN.2018.00043
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