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2015 IEEE International Conference on Data Science and Data Intensive Systems (DSDIS) (2015)
Sydney, Australia
Dec. 11, 2015 to Dec. 13, 2015
ISBN: 978-1-5090-0214-6
pp: 196-203
ABSTRACT
This article posits tamper-resistance as a necessary security measure for cyber-physical systems (CPS). With omnipresent connectivity and pervasive use of mobile devices, software security alone is arguably not sufficient to safeguard sensitive digital information we use everyday. As a result, utilization of a variety of tamper-resistant devices -- including smartcards, secure digital cards with integrated circuits, and mobile phones with subscriber identity module -- has become standard industry practice. Recognizing the need for effective hardware security alongside software security, in this paper, we present the eTRON architecture -- at the core of which lies the tamper-resistant eTRON chip, equipped with functions for mutual authentication, encrypted communication and access control. Besides the security features, the eTRON architecture also offers a wide range of functionalities through a coherent set of application programming interfaces (API) leveraging tamper-resistance. In this paper, we discuss various features of the eTRON architecture, and present two representative eTRON-based applications with a view to evaluating its effectiveness by comparing with other existing applications.
INDEX TERMS
Access control, Computer architecture, Authentication, Libraries, Cryptography, Hardware
CITATION

M. F. Khan and K. Sakamura, "Tamper-Resistant Security for Cyber-Physical Systems with eTRON Architecture," 2015 IEEE International Conference on Data Science and Data Intensive Systems (DSDIS), Sydney, Australia, 2015, pp. 196-203.
doi:10.1109/DSDIS.2015.98
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