The Community for Technology Leaders
2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) (2013)
New York City, NY, USA
Oct. 2, 2013 to Oct. 4, 2013
ISSN: 1550-5774
ISBN: 978-1-4799-1583-5
pp: 149-154
Alexandre Sarafianos , STMicroelectronics, Rousset, France
Mathieu Lisart , STMicroelectronics, Rousset, France
Olivier Gagliano , STMicroelectronics, Rousset, France
Valerie Serradeil , STMicroelectronics, Rousset, France
Cyril Roscian , Centre de Microelectronique de Provence - Georges, Charpak, Gardanne, France
Jean-Max Dutertre , Centre de Microelectronique de Provence - Georges, Charpak, Gardanne, France
Assia Tria , Centre de Microelectronique de Provence - Georges, Charpak, Gardanne, France
ABSTRACT
This paper presents the design of an SRAM cell with a robustness improvement against laser-induced fault injection. We report the fault sensitivity mapping of a first SRAM design. A careful analysis of its results combined with the use of an electrical model at transistor level of the photoelectric effect induced by a laser permit us to validate our approach. The robustness improvement is due to a specific layout which takes into account the topology of the cell and to the effect of a triple well implant on the laser sensitivity of NMOS transistors.
INDEX TERMS
robusteness, SEU, SRAM cell, pulsed PLS, 1064nm wavelength, electrical simulation
CITATION

A. Sarafianos et al., "Robustness improvement of an SRAM cell against laser-induced fault injection," 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), New York City, NY, USA, 2013, pp. 149-154.
doi:10.1109/DFT.2013.6653598
96 ms
(Ver 3.3 (11022016))