19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. (2004)
Oct. 10, 2004 to Oct. 13, 2004
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2004.21
L. Anghel , TIMA Laboratory, Grenoble, France
E. Sanchez , Politecnico di Torino, Italy
M. Sonza Reorda , Politecnico di Torino, Italy
G. Squillero , Politecnico di Torino, Italy
R. Velazco , TIMA Laboratory, Grenoble, France
The actual operating life time for many electronic systems turned out being much longer than originally foreseen, leading to the use of obsolete components in critical projects. To skip microprocessor obsolescence problems, companies should have bought larger stocks of components when still available, or are forced to find parts in secondary markets later. Alternatively, a suitable low-cost solution could be replacing the obsolete component emulating its functionalities with a programmable logic device. However, design verification of microprocessors is well known as a challenging task. This paper proposes a coupled methodology to generate test-programs, using complementary techniques: one pseudo-exhaustive and one driven by an evolutionary optimizer. As a case study, the Motorola 6800 was targeted.
G. Squillero, M. S. Reorda, R. Velazco, E. Sanchez and L. Anghel, "Coupling Different Methodologies to Validate Obsolete Microprocessors," 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.(DFT), Cannes, France, 2004, pp. 250-255.