Electronic Design, Test and Applications, IEEE International Workshop on (2002)

Christchurch, New Zealand

Jan. 29, 2002 to Jan. 31, 2002

ISBN: 0-7695-1453-7

pp: 496

Vivek Gaur , Avant! Corp.

Michael L. Bushnell , Rutgers University

Vishwani D. Agrawal , Agere Systems

ABSTRACT

A new transitive closure algorithm is presented for implication graphs that contain partial implications. In the presence of partial implications, a vertex can assume the true state when all vertices that partially imply it become true. Such graphs provide a more complete representation of a logic circuit than is possible with the conventional pair-wise implications. An application of the new transitive closure algorithm to redundancy identification shows significantly improved results. Empirically, we find the computational complexity of transitive closure to be linear for the implication graphs of the ISCAS benchmark circuits.

INDEX TERMS

Implication graph, logic redundancy, partial implications, transitive closure

CITATION

Vivek Gaur,
Michael L. Bushnell,
Vishwani D. Agrawal,
"A New Transitive Closure Algorithm with Application to Redundancy Identification",

*Electronic Design, Test and Applications, IEEE International Workshop on*, vol. 00, no. , pp. 496, 2002, doi:10.1109/DELTA.2002.994683