Electronic Design, Test and Applications, IEEE International Workshop on (2002)
Christchurch, New Zealand
Jan. 29, 2002 to Jan. 31, 2002
C. Gopalakrishnan , University of South Florida
S. Katkoori , University of South Florida
We present a novel approach for power minimization of CMOS combinational circuits based on transforming power-expensive inputs to functionally equivalent power-optimal inputs. We assume that the environment information is available in the form of either word-level statistics or a long representative input sequence. From the environment information, we derive power-effective input transformations that will save power for any input stream that satisfies the environment properties. We synthesize a transform module that is appended at the primary inputs of the module. The proposed approach can be applied at the system-level by propagating environment information to the primary outputs of the system and then deriving transform circuits for each module. As an example of real-world application, we present results for DCT module in a JPEG compression chip with different input environments (eg. face recognition dataset, weather forecasting). Experimental results are highly encouraging.
C. Gopalakrishnan, S. Katkoori, "Power Optimization of Combinational Circuits by Input Transformations", Electronic Design, Test and Applications, IEEE International Workshop on, vol. 00, no. , pp. 154, 2002, doi:10.1109/DELTA.2002.994605