Electronic Design, Test and Applications, IEEE International Workshop on (2002)
Christchurch, New Zealand
Jan. 29, 2002 to Jan. 31, 2002
Atsumu Iseno , Meiji University
Yukihiro Iguchi , Meiji University
Although fail bit maps in burn-in memory testers are important for analyzing process problems,we need very large storage for storing them. This paper present a method for compressing fail bit maps and storing them catch rams. We classify fail patterns under six types. Catch ram stores the fail types and their locations. Since proposed method is simple, it can be easy implemented in hardware on every DUT(device under test) board. A prototype has been developed by using an FPGA and an SRAM.
Y. Iguchi and A. Iseno, "A Method for Storing Fail Bit Maps in Burn-in Memory Testers," Electronic Design, Test and Applications, IEEE International Workshop on(DELTA), Christchurch, New Zealand, 2002, pp. 142.