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2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) (2013)
Karlovy Vary, Czech Republic Czech Republic
Apr. 8, 2013 to Apr. 10, 2013
ISBN: 978-1-4673-6135-4
TABLE OF CONTENTS
Papers

Hardware-Software Co-Visualization: Developing systems in the holodeck (PDF)

Rolf Drechsler , Group for Computer Architecture, University of Bremen, Germany
Mathias Soeken , Group for Computer Architecture, University of Bremen, Germany
pp. 1-4

Approximate computing for energy-efficient error-resilient multimedia systems (PDF)

Kaushik Roy , Electrical & Computer Engineering, Purdue University, West Lafayette, Indiana, USA
pp. 5-6

Creating options for 3D-SIC testing (PDF)

Erik Jan Marinissen , IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
pp. 7

Interpolation-based model checking for efficient incremental analysis of software (PDF)

G. Fedyukovich , Fac. of Inf., Univ. of Lugano, Lugano, Switzerland
A. E. J. Hyvarinen , Fac. of Inf., Univ. of Lugano, Lugano, Switzerland
N. Sharygina , Fac. of Inf., Univ. of Lugano, Lugano, Switzerland
pp. 8-9

Cross-layer resilient system design (PDF)

M. Tahoori , Karlsruhe Inst. of Technol., Karlsruhe, Germany
pp. 10

Hardware acceleration in computer networks (PDF)

J. Korenek , CESNET, z.s.p.o., Prague, Czech Republic
pp. 11

Fault-based attacks on cryptographic hardware (PDF)

I. Polian , Fac. of Comput. Sci. & Math., Univ. of Passau, Passau, Germany
M. Kreuzer , Fac. of Comput. Sci. & Math., Univ. of Passau, Passau, Germany
pp. 12-17

Exploring processor parallelism: Estimation methods and optimization strategies (Abstract)

R. Jordans , Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands
R. Corvino , Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands
L. Jozwiak , Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands
H. Corporaal , Dept. of Electr. Eng., Eindhoven Univ. of Technol., Eindhoven, Netherlands
pp. 18-23

Area-speed efficient modular architecture for GF(2m) multipliers dedicated for cryptographic applications (Abstract)

D. Pamula , Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland
E. Hrynkiewicz , Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland
pp. 30-35

On the on-line functional test of the Reorder Buffer memory in superscalar processors (Abstract)

S. Di Carlo , Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
E. Sanchez , Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
Matteo Sonza Reorda , Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
pp. 36-41

Fault collapsing of multi-conditional faults (Abstract)

R. Krenz-Baath , Hochschule Hamm-Lippstadt, Hamm, Germany
A. Glowatz , Mentor Graphics, Hamburg, Germany
F. Hapke , Mentor Graphics, Hamburg, Germany
pp. 42-47

Efficient automated speedpath debugging (Abstract)

M. Dehbashi , Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
G. Fey , German Aerosp. Center, Inst. of Space Syst., Bremen, Germany
pp. 48-53

A static analysis approach to data race detection in SystemC designs (Abstract)

M. Moiseev , St. Petersburg State Polytech. Univ., St. Petersburg, Russia
M. Glukhikh , Clausthal Univ. of Technol., Clausthal, Germany
A. Zakharov , Yandex, St. Petersburg, Russia
H. Richter , Clausthal Univ. of Technol., Clausthal, Germany
pp. 54-59

Debugging HDL designs based on functional equivalences with high-level specifications (Abstract)

A. Finder , Univ. of Bremen, Bremen, Germany
J. Witte , Univ. of Bremen, Bremen, Germany
G. Fey , Univ. of Bremen, Bremen, Germany
pp. 60-65

Design of stochastic Viterbi decoders for convolutional codes (Abstract)

Te-Hsuan Chen , Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
J. P. Hayes , Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
pp. 66-71

10Gb/s inverter based cascode transimpedance amplifier in 40nm CMOS technology (Abstract)

M. Atef , Inst. of Electrodynamics Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
Hong Chen , Inst. of Electrodynamics Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
H. Zimmermann , Inst. of Electrodynamics Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
pp. 72-75

Ultra-high bandwidth fully-differential three-stage operational amplifiers in 40nm digital CMOS (Abstract)

Hong Chen , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
V. Milovanovic , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
D. Giotta , Lantiq A GmbH, Villach, Austria
H. Zimmermann , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
pp. 76-81

A GHz full-division-range programmable divider with output duty-cycle improved (Abstract)

Yu-Lung Lo , Dept. of Electron. Eng., Nat. Kaohsiung Normal Univ., Yanchao, Taiwan
Jhih-Wei Tsai , Dept. of Electron. Eng., Nat. Kaohsiung Normal Univ., Yanchao, Taiwan
Han-Ying Liu , Dept. of Electron. Eng., Nat. Kaohsiung Normal Univ., Yanchao, Taiwan
Wei-Bin Yang , Dept. of Electr. Eng., Tamkang Univ., Taipei, Taiwan
pp. 82-85

An area efficient hardware architecture design for H.264/AVC intra prediction reconstruction path based on partial reconfiguration (Abstract)

M. Orlandic , Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
K. Svarstad , Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
pp. 86-91

Automatic synthesis of small AdaBoost classifier in FPGA (Abstract)

F. Kadlcek , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
O. Fucik , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
pp. 92-97

A low jitter delay-locked-loop applied for DDR4 (Abstract)

Yo-Hao Tu , Dept. of Electr. Eng., Nat. Central Univ., Chungli, Taiwan
Kuo-Hsing Cheng , Dept. of Electr. Eng., Nat. Central Univ., Chungli, Taiwan
Hsiang-Yun Wei , Dept. of Electr. Eng., Nat. Central Univ., Chungli, Taiwan
Hong-Yi Huang , Grad. Inst. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
pp. 98-101

Power analysis methodology for secure circuits (Abstract)

K. Gomina , STMicroelectron., Crolles, France
J. Rigaud , Dept. Syst. et Archit. Securisees (SAS), Ecole Nat. Super. des Mines de St.-Etienne, Gardanne, France
P. Gendrier , STMicroelectron., Crolles, France
P. Candelier , STMicroelectron., Crolles, France
A. Tria , Dept. Syst. et Archit. Securisees (SAS), Ecole Nat. Super. des Mines de St.-Etienne, Gardanne, France
pp. 102-107

Towards hardware architecture for memory efficient IPv4/IPv6 Lookup in 100 Gbps networks (Abstract)

J. Matousek , IT4Innovations Centre of Excellence, Brno Univ. of Technol., Brno, Czech Republic
M. Skacan , IT4Innovations Centre of Excellence, Brno Univ. of Technol., Brno, Czech Republic
J. Korenek , IT4Innovations Centre of Excellence, Brno Univ. of Technol., Brno, Czech Republic
pp. 108-111

Extensible open-source framework for translating RTL VHDL IP cores to SystemC (Abstract)

S. A. Syed , IBM, Bangalore, India
M. Jenihhin , Tallinn Univ. of Technol., Tallinn, Estonia
J. Raik , Tallinn Univ. of Technol., Tallinn, Estonia
pp. 112-115

Multiobjective evolution of approximate multiple constant multipliers (Abstract)

J. Petrlik , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
L. Sekanina , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
pp. 116-119

Hardware architecture for the fast pattern matching (Abstract)

J. Kastil , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
V. Kosar , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
J. Korenek , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
pp. 120-123

Digital methods of offset compensation in 90nm CMOS operational amplifiers (Abstract)

G. Nagy , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
D. Arbet , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
V. Stopjakova , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
pp. 124-127

Frequency injection attack on a random number generator (Abstract)

S. Buchovecka , Fac. of Inf. Technol., Czech Tech. Univ. in Prague, Prague, Czech Republic
J. Hlavac , Fac. of Inf. Technol., Czech Tech. Univ. in Prague, Prague, Czech Republic
pp. 128-130
Papers

Intermediate frequency filter calibration method for radio frequency receivers in modern CMOS technologies (PDF)

Krzysztof Siwiec , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
Aleksander Koter , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
Witold A. Pleskacz , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
pp. 165-169

Proton beam characterization at Oslo Cyclotron Laboratory for radiation testing of electronic devices (Abstract)

A. Hasanbegovic , Dept. of Inf., Univ. of Oslo, Oslo, Norway
S. Aunet , Dept. of Electron. & Telecommun., NTNU (Norwegian Univ. of Sci. & Technol.), Trondheim, Norway
pp. 135-140

Enhanced fault-tolerant Network-on-Chip architecture using hierarchical agents (Abstract)

M. Valinataj , Sch. of Electr. & Comput. Eng., Babol Univ. of Technol., Babol, Iran
P. Liljeberg , Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
J. Plosila , Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
pp. 141-146

A system-level overview and comparison of three High-Speed Serial Links: USB 3.0, PCI Express 2.0 and LLI 1.0 (Abstract)

J. Saade , ST-Ericsson, Grenoble, France
F. Petrot , TIMA Lab., Joseph Fourier Univ., Grenoble, France
A. Picco , STMicroelectron., Grenoble, France
J. Huloux , STMicroelectron., Grenoble, France
A. Goulahsen , STMicroelectron., Grenoble, France
pp. 147-152

A Multi-Credit Flow Control scheme for asynchronous NoCs (Abstract)

S. R. Naqvi , Vienna Univ. of Technol., Vienna, Austria
R. Najvirt , Vienna Univ. of Technol., Vienna, Austria
A. Steininger , Vienna Univ. of Technol., Vienna, Austria
pp. 153-158

An indirect technique for estimating reliability of analog and mixed-signal systems during operational life (Abstract)

M. A. Khan , Testable Design & Test of Integrated Syst. (TDT) Group, Univ. of Twente, Enschede, Netherlands
H. G. Kerkhoff , Testable Design & Test of Integrated Syst. (TDT) Group, Univ. of Twente, Enschede, Netherlands
pp. 159-164

Numerical method for DC fault analysis simplification and simulation time reduction (Abstract)

J. Brenkus , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
V. Stopjakova , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
G. Gyepes , Dept. of IC Design & Test, Slovak Univ. of Technol., Bratislava, Slovakia
pp. 170-174

Relocation of reconfigurable modules on Xilinx FPGA (Abstract)

T. Drahonovsky , Inst. of Inf. Technol. & Electron., Tech. Univ. of Liberec, Liberec, Czech Republic
M. Rozkovec , Inst. of Inf. Technol. & Electron., Tech. Univ. of Liberec, Liberec, Czech Republic
O. Novak , Inst. of Inf. Technol. & Electron., Tech. Univ. of Liberec, Liberec, Czech Republic
pp. 175-180

On performance estimation of a scalable VLIW soft-core in XILINX FPGAs (Abstract)

P. Pfeifer , ITE FM, Tech. Univ. of Liberec, Liberec, Czech Republic
Z. Pliva , ITE FM, Tech. Univ. of Liberec, Liberec, Czech Republic
M. Scholzel , Brandenburg Univ. of Technol., Cottbus, Germany
T. Koal , Brandenburg Univ. of Technol., Cottbus, Germany
H. T. Vierhaus , Brandenburg Univ. of Technol., Cottbus, Germany
pp. 181-186

On the feasibility of combining on-line-test and self repair for logic circuits (Abstract)

T. Koal , Brandenburg Univ. of Technol. Cottbus, Brandenburg, Germany
M. Ulbricht , Brandenburg Univ. of Technol. Cottbus, Brandenburg, Germany
P. Engelke , Infineon Technol. AG, Neubiberg, Germany
H. T. Vierhaus , Brandenburg Univ. of Technol. Cottbus, Brandenburg, Germany
pp. 187-192

Yield-oriented energy and performance model for subthreshold circuits with Vth variations (Abstract)

H. K. O. Berge , Dept. of Inf., Univ. of Oslo, Oslo, Norway
S. Aunet , Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
pp. 193-198

VeSFET as an analog-circuit component (Abstract)

D. Kasprowicz , Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland
B. Swacha , Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland
pp. 199-204

Efficient mixture preparation on digital microfluidic biochips (Abstract)

S. Kumar , Dept. of Comput. Sci. & Eng., IIT Kharagpur, Kharagpur, India
S. Roy , Dept. of Comput. Sci. & Eng., IIT Kharagpur, Kharagpur, India
P. P. Chakrabarti , Dept. of Comput. Sci. & Eng., IIT Kharagpur, Kharagpur, India
B. B. Bhattacharya , Adv. Comput. & Microelectron. Unit, ISI Kolkata, Kolkata, India
K. Chakrabarty , Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
pp. 205-210

Composing data-driven circuits using handshake in the clock-synchronous domain (Abstract)

J. Sykora , Inst. of Inf. Theor. & Autom. (UTIA), Prague, Czech Republic
pp. 211-214

A don't care identification method for test compaction (Abstract)

H. Yamazaki , Nihon Univ., Chiba, Japan
M. Wakazono , Nihon Univ., Chiba, Japan
T. Hosokawa , Nihon Univ., Chiba, Japan
M. Yoshimura , Kyushu Univ., Fukuoka, Japan
pp. 215-218

Test pattern decompression in parallel scan chain architecture (Abstract)

M. Chloupek , Czech Tech. Univ. in Prague, Prague, Czech Republic
J. Jenicek , Tech. Univ. in Liberec, Liberec, Czech Republic
O. Novak , Tech. Univ. in Liberec, Liberec, Czech Republic
M. Rozkovec , Tech. Univ. in Liberec, Liberec, Czech Republic
pp. 219-223

Indoor energy harvesting using photovoltaic cell for battery recharging (Abstract)

Hong-Yi Huang , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
C. O. Mocorro , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
J. Pinaso , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
Kuo-Hsing Cheng , Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
pp. 224-227

Noise and linearity analysis of a frequency to voltage converter (Abstract)

J. A. Michaelsen , Dept. of Inf., Univ. of Oslo, Oslo, Norway
D. T. Wisland , Dept. of Inf., Nanoelectron. Group, Univ. of Oslo, Oslo, Norway
pp. 228-231

Energy-aware software development for embedded systems in HW/SW co-design (Abstract)

P. Ehrlich , Design Autom. Div., EAS, Fraunhofer IIS, Dresden, Germany
S. Radke , Design Autom. Div., EAS, Fraunhofer IIS, Dresden, Germany
pp. 232-235

External capacitorless low dropout linear regulator using cascode structure (Abstract)

Hong-Yi Huang , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
Cheng-Yu Chen , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
Kuo-Hsing Cheng , Dept. of Electr. Eng., Nat. Taipei Univ., Taipei, Taiwan
pp. 236-239

FPGA based time-of-flight 3D camera characterization system (Abstract)

J. Seiter , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
M. Hofbauer , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
M. Davidovic , Avago Technol. Fiber Austria, Vienna, Austria
H. Zimmermann , Inst. of Electrodynamics, Microwave & Circuit Eng., Vienna Univ. of Technol., Vienna, Austria
pp. 240-245

Error resilient OBDDs (Abstract)

A. Bernasconi , Dept. of Comput. Sci., Univ. di Pisa, Pisa, Italy
V. Ciriani , Dept. of Comput. Sci., Univ. degli Studi di Milano, Milan, Italy
L. Lago , Dept. of Comput. Sci., Univ. degli Studi di Milano, Milan, Italy
pp. 246-249

Design of an S-band 0.35 µm AlGaN/GaN LNA using cascode topology (Abstract)

H. L. Kao , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
C. S. Yeh , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
C. L. Cho , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
B. W. Wang , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
P. C. Lee , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
B. H. Wei , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
H. C. Chiu , Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan
pp. 250-253

Assertion based verification using PSL-like properties in Haskell (Abstract)

B. N. Uchevler , Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
K. Svarstad , Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
pp. 254-257

Reliability-aware cross-layer custom instruction screening (Abstract)

B. J. Farahani , Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
A. Azarpeyvand , Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
S. Safari , Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
S. M. Fakhraie , Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
pp. 258-262

Efficiency of oscillation-based BIST in 90nm CMOS active analog filters (Abstract)

D. Arbet , Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
G. Nagy , Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
V. Stopjakova , Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
G. Gyepes , Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
pp. 263-266

FPGA architecture for fast floating point matrix inversion using uni-dimensional systolic array based structure (Abstract)

O. Hnilicka , Fac. of Mechatron., Inf. & Interdiscipl. Studies, Tech. Univ. of Liberec, Liberec, Czech Republic
pp. 267-270

Redundancy algorithm for embedded memories with block-based architecture (Abstract)

S. Kristofik , Inst. of Comput. Syst. & Networks, Slovak Univ. of Technol., Bratislava, Slovakia
E. Gramatova , Inst. of Comput. Syst. & Networks, Slovak Univ. of Technol., Bratislava, Slovakia
pp. 271-274

Analysis and comparison of functional verification and ATPG for testing design reliability (Abstract)

M. Simkova , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
Z. Kotasek , Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
C. Bolchini , Dip. Elettron., Inf. e Bioingegneria, Politec. di Milano, Milan, Italy
pp. 275-278

Fault-Tolerant Reconfigurable Low-Power pseudoRandom number Generator (Abstract)

V. Petrovic , Syst. Design, IHP, Frankfurt (Oder), Germany
Z. Stamenkovic , Syst. Design, IHP, Frankfurt (Oder), Germany
M. Stojcev , Fac. of Electron. Eng., Univ. of Nis, Niš, Serbia
T. Nikolic , Fac. of Electron. Eng., Univ. of Nis, Niš, Serbia
G. Jovanovic , Fac. of Electron. Eng., Univ. of Nis, Niš, Serbia
pp. 279-282
Papers

Author index (PDF)

pp. 299-300

[Front cover] (PDF)

pp. c1

[Title page] (PDF)

pp. 1

Sponsors (PDF)

pp. 1
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