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2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) (2012)
Tallinn
April 18, 2012 to April 20, 2012
ISBN: 978-1-4673-1187-8
TABLE OF CONTENTS

Foreword to the 15th IEEE DDECS Symposium (PDF)

Jaan Raik , Tallinn University of Technology (EE)
Viera Stopjakova , Slovak University of Technology (SK)
Heinrich T. Vierhaus , Brandenburg University of Technology (DE)
Witold Pleskacz , Warsaw University of Technology (PL)
Raimund Ubar , Tallinn University of Technology (EE)
Helena Kruus , Tallinn University of Technology (EE)
Maksim Jenihhin , Tallinn University of Technology (EE)
pp. 1

TSV based 3D stacked ICs: Opportunities and challenges (PDF)

Said Hamdioui , Delft University of Technology, Netherlands
pp. 2

Vertical Slit Transistor based Integrated Circuits (VeSTICs) (PDF)

Andrzej Pfitzner , Warsaw University of Technology, Poland
pp. 3

Asynchronous circuit design: From basics to practical applications (PDF)

Eckhard Grass , IHP GmbH, Germany
Milos Krstic , IHP GmbH, Germany
Xin Fan , IHP GmbH, Germany
Steffen Zeidler , IHP GmbH, Germany
pp. 5

Automated synthesis and design-error repair of systems (PDF)

Georg Hofferek , Graz University of Technology, Austria
pp. 6

Fault management in an IEEE P1687 (IJTAG) environment (PDF)

Erik Larsson , Lund University, Sweden
Konstantin Sibin , Testonica Lab, Estonia
pp. 7

Design methodology for fault tolerant ASICs (PDF)

Vladimir Petrovic , IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Marko Ilic , IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Gunter Schoof , IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Zoran Stamenkovic , IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
pp. 8-11

Selective redundancy to improve reliability and to slow down delay degradation due to gate oxide breakdown (PDF)

Hagen Saemrow , Department of Electrical Engineering, University of Rostock, Germany
Claas Cornelius , Department of Electrical Engineering, University of Rostock, Germany
Philipp Gorski , Department of Electrical Engineering, University of Rostock, Germany
Andreas Tockhorn , Department of Electrical Engineering, University of Rostock, Germany
Dirk Timmermann , Department of Electrical Engineering, University of Rostock, Germany
pp. 12-15

Synthesis of Petri nets into FPGA with operation flexible memories (PDF)

Arkadiusz Bukowiec , Institute of Computer Engineering and Electronics, University of Zielona Góra, ul. Podgórna 50, 65-246, Poland
Marian Adamski , Institute of Computer Engineering and Electronics, University of Zielona Góra, ul. Podgórna 50, 65-246, Poland
pp. 16-21

An evaluation of the application dependent FPGA test method (PDF)

Martin Rozkovec , Institute of information technologies and electronics, Faculty of Informatics, Mechatronics and Interdisciplinary studies, Technical University in Liberec, Czech Republic
Jiri Jenicek , Institute of information technologies and electronics, Faculty of Informatics, Mechatronics and Interdisciplinary studies, Technical University in Liberec, Czech Republic
Ondej Novak , Institute of information technologies and electronics, Faculty of Informatics, Mechatronics and Interdisciplinary studies, Technical University in Liberec, Czech Republic
pp. 22-25

AGATE - towards designing a low-power chip multithreading processor for mobile software defined radio systems (PDF)

Krzysztof Marcinek , Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662, Poland
Witold A. Pleskacz , Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662, Poland
pp. 26-29

Improving the iterative power of resynthesis (PDF)

Petr Fiser , Faculty of Information Technology, Czech Technical University in Prague, Czech Republic
Jan Schmidt , Faculty of Information Technology, Czech Technical University in Prague, Czech Republic
pp. 30-33

NAND/NOR gate polymorphism in low temperature environment (PDF)

Richard Ruzicka , IT4Innovations Centre of Excellence, Faculty of Information Technology, Bozetechova 2, Czech Republic
Vaclav Simek , IT4Innovations Centre of Excellence, Faculty of Information Technology, Bozetechova 2, Czech Republic
pp. 34-37

Current sensing completion detection in dual-rail asynchronous systems (PDF)

Lukas Nagy , Institute of Electronics and Photonics, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjakova , Institute of Electronics and Photonics, Slovak University of Technology, Bratislava, Slovakia
pp. 38-41

Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST (PDF)

M. H. Haghbayan , Electrical and Computer Engineering Department, School of Engineering Colleges Campus #2 University of Tehran, Iran
S. Safari , Electrical and Computer Engineering Department, School of Engineering Colleges Campus #2 University of Tehran, Iran
Z. Navabi , Electrical and Computer Engineering Department, School of Engineering Colleges Campus #2 University of Tehran, Iran
pp. 42-45

A low-overhead monitoring ring interconnect for MPSoC parameter optimization (PDF)

Abdelmajid Bouajila , Institute for Integrated Systems, Technische Universitaet Muenchen, Arcisstr. 21, Munich 80290, Germany
Abdallah Lakhtel , Institute for Integrated Systems, Technische Universitaet Muenchen, Arcisstr. 21, Munich 80290, Germany
Johannes Zeppenfeld , Institute for Integrated Systems, Technische Universitaet Muenchen, Arcisstr. 21, Munich 80290, Germany
Walter Stechele , Institute for Integrated Systems, Technische Universitaet Muenchen, Arcisstr. 21, Munich 80290, Germany
Andreas Herkersdorf , Institute for Integrated Systems, Technische Universitaet Muenchen, Arcisstr. 21, Munich 80290, Germany
pp. 46-49

Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs (PDF)

Alexander Wold , Department of Informatics, University of Oslo, Norway
Dirk Koch , Department of Informatics, University of Oslo, Norway
Jim Torresen , Department of Informatics, University of Oslo, Norway
pp. 50-55

An automated infrastructure for real-time monitoring of multi-core Systems-on-Chip (PDF)

George Kornaros , Electronics & Computer Engineering Department, Technical University of Crete, Kounoupidiana, Chania, Greece
Ioannis Christoforakis , Applied Informatics & Multimedia Department, Technological Educational Institute, Estavromenos, Heraklion, Greece
Maria Astrinaki , Applied Informatics & Multimedia Department, Technological Educational Institute, Estavromenos, Heraklion, Greece
pp. 56-61

The architecture and the technology characterization of an FPGA-based customizable Application-Specific Vector Processor (PDF)

Jaroslav Sykora , Department of Signal Processing, Institute of Information Theory and Automation (UTIA) of the ASCR, v.v.i., Pod Vodarenskou vezi 4, Prague, Czech Republic
Lukas Kohout , Department of Signal Processing, Institute of Information Theory and Automation (UTIA) of the ASCR, v.v.i., Pod Vodarenskou vezi 4, Prague, Czech Republic
Roman Bartosinski , Department of Signal Processing, Institute of Information Theory and Automation (UTIA) of the ASCR, v.v.i., Pod Vodarenskou vezi 4, Prague, Czech Republic
Leos Kafka , Department of Signal Processing, Institute of Information Theory and Automation (UTIA) of the ASCR, v.v.i., Pod Vodarenskou vezi 4, Prague, Czech Republic
Martin Danek , Department of Signal Processing, Institute of Information Theory and Automation (UTIA) of the ASCR, v.v.i., Pod Vodarenskou vezi 4, Prague, Czech Republic
Petr Honzik , CIP plus s.r.o., Milinska 130, Pribram, Czech Republic
pp. 62-67

LC-VCO design automation tool for nanometer CMOS technology (PDF)

Krzysztof Siwiec , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
Tomasz Borejko , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
Witold A. Pleskacz , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
pp. 68-73

A gigabit fully integrated plastic optical fiber receiver for a RC-LED source (PDF)

M. Atef , Vienna University of Technology, Institute of Electrodynamics Microwave and Circuit Engineering, Gusshausstrasse 25 / 354, 1040, Austria
R. Swoboda , A3PICs Electronics Development GmbH, Webergasse 18/9, 1200 Vienna, Austria
H. Zimmermann , Vienna University of Technology, Institute of Electrodynamics Microwave and Circuit Engineering, Gusshausstrasse 25 / 354, 1040, Austria
pp. 74-78

A low phase noise Ka-band voltage controlled oscillator using 0.15 µm GaAs pHEMT technology (PDF)

H. L. Kao , Department of Electronic Engineering, Chang Gung University, Tao-Yuan, Taiwan
S. P. Shih , Department of Electronic Engineering, Chang Gung University, Tao-Yuan, Taiwan
C. S. Yeh , Department of Electronic Engineering, Chang Gung University, Tao-Yuan, Taiwan
L. C. Chang , Dept. of Materials Engineering, Ming Chi University of Technology, Taipei, Taiwan
pp. 79-82

A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations (PDF)

Haoyuan Ying , Darmstadt University of Technology, Merckstr. 25, 64283, Germany
Ashok Jaiswal , Darmstadt University of Technology, Merckstr. 25, 64283, Germany
Mohamed A Abd El Ghany , German University Cairo, New Cairo City, Egypt
Thomas Hollstein , Tallinn University of Technology, Raja 15, 12618, Estonia
Klaus Hofmann , Darmstadt University of Technology, Merckstr. 25, 64283, Germany
pp. 83-88

HLS-DoNoC: High-level simulator for dynamically organizational NoCs (PDF)

Liang Guang , University of Turku, Findland
Ethiopia Nigussie , University of Turku, Findland
Juha Plosila , University of Turku, Findland
Jouni Isoaho , University of Turku, Findland
Hannu Tenhunen , Royal Institute of Technology, Sweden
pp. 89-94

Low-area boundary BIST architecture for mesh-like network-on-chip (PDF)

Jaan Raik , Tallinn University of Technology, Estonia
Vineeth Govind , Tallinn University of Technology, Estonia
pp. 95-100

Test and configuration architecture of a sub-THz CMOS detector array (PDF)

Peter Foldesy , The Computer and Automation Research Institute, MTA-SZTAKI, Hungarian Academy of Sciences, Budapest, Hungary
Domonkos Gergelyi , Faculty of Information Technology, Péter Pázmány Catholic University, PPKE-ITK, Budapest, Hungary
Csaba Fuzy , Department of Broadband, Infocommunicatons and Electromagnetic Theory, Budapest University of Technology and Economics, Hungary
Gergely Karolyi , Department of Broadband, Infocommunicatons and Electromagnetic Theory, Budapest University of Technology and Economics, Hungary
pp. 101-104

Automatic integration of hardware descriptions into system-level models (PDF)

Ralph Gorgen , OFFIS Institute for Information Technology, 26121 Oldenburg, Germany
Jan-Hendrik Oetjens , Robert Bosch GmbH, 72762 Reutlingen, Germany
Wolfgang Nebel , Carl von Ossietzky University, 26111 Oldenburg, Germany
pp. 105-110

Multisine signal generation method for a bioimpedance measurement device (PDF)

Maksim Gorev , Department of Computer Engineering, Tallinn University of Technology, Estonia
Vadim Pesonen , Department of Computer Engineering, Tallinn University of Technology, Estonia
Peeter Ellervee , Department of Computer Engineering, Tallinn University of Technology, Estonia
pp. 111-114

Radiation-tolerant combinational gates - an implementation based comparison (PDF)

Varadan Savulimedu Veeravalli , Institute of Computer Engineering, Vienna University of Technology, (Austria)
Andreas Steininger , Institute of Computer Engineering, Vienna University of Technology, (Austria)
pp. 115-120

Monitoring-driven HW/SW interrupt overload prevention for embedded real-time systems (PDF)

Josef Strnadel , Brno University of Technology, Faculty of Information Technology, IT4Innovations Centre of Excellence, Czech Republic
pp. 121-126

Efficient link-level error resilience in 3D NoCs (PDF)

Vladimir Pasca , TIMA Laboratory (INP-Grenoble, UJF, CNRS), France
Saif-Ur Rehman , TIMA Laboratory (INP-Grenoble, UJF, CNRS), France
Lorena Anghel , TIMA Laboratory (INP-Grenoble, UJF, CNRS), France
Mounir Benabdenbi , TIMA Laboratory (INP-Grenoble, UJF, CNRS), France
pp. 127-132

The design of dependable flexible multi-sensory System-on-Chips for security applications (PDF)

Hans G. Kerkhoff , Testable Design and Test of Integrated Systems (TDT) Group, University of Twente, Centre for Telematics and Information Technology (CTIT), Enschede, the Netherlands
Yong Zhao , Testable Design and Test of Integrated Systems (TDT) Group, University of Twente, Centre for Telematics and Information Technology (CTIT), Enschede, the Netherlands
pp. 133-138

System side-channel leakage emulation for HW/SW security coverification of MPSoCs (PDF)

Armin Krieg , Institute for Technical Informatics, Graz University of Technology, Austria
Johannes Grinschgl , Institute for Technical Informatics, Graz University of Technology, Austria
Christian Steger , Institute for Technical Informatics, Graz University of Technology, Austria
Reinhold Weiss , Institute for Technical Informatics, Graz University of Technology, Austria
Holger Bock , Design Center Graz, Infineon Technologies Austria AG, Austria
Josef Haid , Design Center Graz, Infineon Technologies Austria AG, Austria
pp. 139-144

Security properties of oscillator rings in true random number generators (PDF)

Knut Wold , Gjøvik University College, NISlab, Department of Computer Science and Media Technology, Norway
Slobodan Petrovic , Gjøvik University College, NISlab, Department of Computer Science and Media Technology, Norway
pp. 145-150

Differential evolutionary optimization algorithm applied to ESD MOSFET model fitting problem (PDF)

Tomas Napravnik , ASICentrum s.r.o., Novodvorska 994, Prague, Czech Republic
Vlastimil Kote , Czech Technical University in Prague, Faculty of Electrical Engineering, Dept. of Microelectronics, Technicka 2, Czech Republic
Vladimir Molata , Czech Technical University in Prague, Faculty of Electrical Engineering, Dept. of Microelectronics, Technicka 2, Czech Republic
Jiri Jakovenko , Czech Technical University in Prague, Faculty of Electrical Engineering, Dept. of Microelectronics, Technicka 2, Czech Republic
pp. 155-158

A three-dimensional DRAM using floating body cell in FDSOI devices (PDF)

Xuelian Liu , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
Aamir Zia , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
Mitchell R. LeRoy , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
Srikumar Raman , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
Ryan Clark , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
Russell Kraft , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
John F. McDonald , Rensselaer Polytechnic Institute, Center for Integrated Electronics, Troy, NY 12180, USA
pp. 159-162

CDMA technique for Network-on-Chip (PDF)

Ahmed A. El Badry , Communications Engineering Dept., German University in Cairo, Egypt
Mohamed A. Abd El ghany , Electronics Engineering Dept., German University in Cairo, Egypt
pp. 163-166

Application of IDDT test towards increasing SRAM reliability in nanometer technologies (PDF)

Gabor Gyepes , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Daniel Arbet , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Juraj Brenkus , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjakova , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
pp. 167-170

Evaluation of susceptibility of FPGA-based circuits to fault injection attacks based on clock glitching (PDF)

Jakub Korczyc , Institute of Telecommunications, Warsaw University of Technology, Poland
Andrzej Krasniewski , Institute of Telecommunications, Warsaw University of Technology, Poland
pp. 171-174

D&T Presenter - electronic interactive system for design and test education (PDF)

Matej Hlatky , Slovak University of Technology, Faculty of Informatics and Information Technologies, Bratislava, Slovakia
Valter Martinek , Slovak University of Technology, Faculty of Informatics and Information Technologies, Bratislava, Slovakia
Elena Gramatova , Slovak University of Technology, Faculty of Informatics and Information Technologies, Bratislava, Slovakia
pp. 175-178

A 1V, low power, high-gain, 3 – 11 GHz double-balanced CMOS sub-harmonic mixer (PDF)

Rouhollah Feghhi , Department of Electrical Engineering, Ferdowsi University of Mashhad, Iran
Sasan Naseh , Department of Electrical Engineering, Ferdowsi University of Mashhad, Iran
pp. 179-182

Reduction of complex safety models based on Markov chains (PDF)

Martin Kohlik , Department of Digital Design, Faculty of Information Technology, Czech Technical University in Prague, Thákurova 9, 160 00 6, Czech Republic
Hana Kubatova , Department of Digital Design, Faculty of Information Technology, Czech Technical University in Prague, Thákurova 9, 160 00 6, Czech Republic
pp. 183-186

Generation of SystemC/TLM code from UML/MARTE sequence diagrams for verification (PDF)

Emad Ebeid , Dept. of Computer Science - University of Verona, Italy
Davide Quaglia , Dept. of Computer Science - University of Verona, Italy
Franco Fummi , Dept. of Computer Science - University of Verona, Italy
pp. 187-190

A 512 kb SRAM in 65nm CMOS with divided bitline and novel two-stage sensing technique (PDF)

Xiang Zheng , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Ming Liu , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Hong Chen , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Huamin Cao , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Cong Wang , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Zhiqiang Gao , Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084, China
pp. 191-192

OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters (PDF)

Daniel Arbet , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Gabor Gyepes , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Juraj Brenkus , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjakova , Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology, Bratislava, Slovakia
pp. 193-194

Optimised Power Supply Unit Design (PDF)

Martin Pospisilik , Faculty of Applied Informatics, Tomas Bata University in Zlin, Czech Republic
Milan Adamek , Faculty of Applied Informatics, Tomas Bata University in Zlin, Czech Republic
pp. 195-196

Lightweight cipher resistivity against brute-force attack: Analysis of PRESENT (PDF)

Jan Pospisil , Department of Digital Design, Czech Technical University in Prague, Faculty of Information Technology, Czech Republic
Martin Novotny , Department of Digital Design, Czech Technical University in Prague, Faculty of Information Technology, Czech Republic
pp. 197-198

VHDLVisualizer: HDL model visualization with simulation-based verification (PDF)

Dominik Macko , Slovak University of Technology, Faculty of Informatics and Information Technologies, Bratislava, Slovakia
Katarina Jelemenska , Slovak University of Technology, Faculty of Informatics and Information Technologies, Bratislava, Slovakia
pp. 199-200

Temperature and on-chip crosstalk measurement using ring oscillators in FPGA (PDF)

Martin Gag , Institute of Applied Microelectronics and Computer Engineering, University of Rostock, 18051, Germany
Tim Wegner , Institute of Applied Microelectronics and Computer Engineering, University of Rostock, 18051, Germany
Ansgar Waschki , Institute of Applied Microelectronics and Computer Engineering, University of Rostock, 18051, Germany
Dirk Timmermann , Institute of Applied Microelectronics and Computer Engineering, University of Rostock, 18051, Germany
pp. 201-204

Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit (PDF)

Martin Wirnshofer , Institute for Technical Electronics, Technische Universität München, Munich, Germany
Leonhard Heiss , Institute for Technical Electronics, Technische Universität München, Munich, Germany
Anil Narayan Kakade , Institute for Technical Electronics, Technische Universität München, Munich, Germany
Nasim Pour Aryan , Institute for Technical Electronics, Technische Universität München, Munich, Germany
Georg Georgakos , Infineon Technologies AG, Neubiberg, Germany
Doris Schmitt-Landsiedel , Institute for Technical Electronics, Technische Universität München, Munich, Germany
pp. 205-208

Effective RT-level software-based self-testing of embedded processor cores (PDF)

Parisa Sha'afi Kabiri , Electrical and Computer Engineering Department, School of Engineering Colleges, Campus 2, University of Tehran, Iran
Zainalabedin Navabi , Electrical and Computer Engineering Department, School of Engineering Colleges, Campus 2, University of Tehran, Iran
pp. 209-212

High speed FPGA implementation of hough transform for real-time applications (PDF)

Liberis Voudouris , Department of Physics, Aristotle University of Thessaloniki, Greece
Spiridon Nikolaidis , Department of Physics, Aristotle University of Thessaloniki, Greece
Abdoul Rjoub , Computer Engineering Department, Jordan University of Science and Technology, Irbid, Jordan
pp. 213-218

Generation of non-overlapping clock signals without using a feedback loop (PDF)

R. Spilka , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
G. Hilber , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
A. Rauchenecker , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
D. Gruber , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
M. Sams , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
T. Ostermann , Johannes Kepler University, Institute for Integrated Circuits, 4040 Linz, Austria
pp. 219-223

Design and implementation of high-performance high-valency ling adders (PDF)

Taskin Kocak , Dept. of Computer Engineering, Bahcesehir University, Istanbul, Turkey
Preeti Patil , Dept. of Electrical and Electronics Engr., University of Bristol, UK
pp. 224-229

A new SAT-based ATPG for generating highly compacted test sets (PDF)

Stephan Eggersglu , University of Bremen, 28359, Germany
Rene Krenz-Baath , Hochschule Hamm-Lippstadt, 59063, Germany
Andreas Glowatz , Mentor Graphics, 21079 Hamburg, Germany
Friedrich Hapke , Mentor Graphics, 21079 Hamburg, Germany
Rolf Drechsler , University of Bremen, 28359, Germany
pp. 230-235

Multiple stuck-at-fault detection theorem (PDF)

Raimund Ubar , Department of Computer Engineering, Tallinn University of Technology, Estonia
Sergei Kostin , Department of Computer Engineering, Tallinn University of Technology, Estonia
Jaan Raik , Department of Computer Engineering, Tallinn University of Technology, Estonia
pp. 236-241

Genetic method for compressed skewed-load delay test generation (PDF)

Roland Dobai , Institute of Informatics, Slovak Academy of Sciences, Bratislava, Slovak Republic
Marcel Balaz , Institute of Informatics, Slovak Academy of Sciences, Bratislava, Slovak Republic
pp. 242-247

Auto-calibration techniques in built-in jitter measurement circuit (PDF)

Chih-Ping Cheng , Department of Electrical Engineering, National Central University, Taiwan
Jen-Chieh Liu , Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan
Kuo-Hsing Cheng , Department of Electrical Engineering, National Central University, Taiwan
pp. 248-249

Low power balun Design for 1.575 GHz in 90 nm CMOS rechnology (PDF)

Jacek Gradzki , Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, POLAND
pp. 250-253

Digital-driven formal analog verification for asynchronously feed-backed circuitries (PDF)

Gurkan Uygur , Chair of Reliable Circuits and Systems, LZS, Friedrich-Alexander-University Erlangen-Nuremberg, Paul-Gordan-Str. 5, 91052, Germany
Sebastian M. Sattler , Chair of Reliable Circuits and Systems, LZS, Friedrich-Alexander-University Erlangen-Nuremberg, Paul-Gordan-Str. 5, 91052, Germany
pp. 254-257

Bounded model checking of Contiki applications (PDF)

Thilo Vortler , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division EAS, Zeunerstraße 38, 01069 Dresden, Germany
Steffen Rulke , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division EAS, Zeunerstraße 38, 01069 Dresden, Germany
Petra Hofstedt , Brandenburg University of Technology Cottbus, Department of Computer Science, 03013, Germany
pp. 258-261

Low power scan by partitioning and scan hold (PDF)

Efi Arvaniti , University of Ioannina, Department of Computer Science, 45110, Greece
Yiorgos Tsiatouhas , University of Ioannina, Department of Computer Science, 45110, Greece
pp. 262-265

A user-level library for fault tolerance on shared memory multicore systems (PDF)

Hamid Mushtaq , Computer Engineering Laboratory, Delft University of Technology, the Netherlands
Zaid Al-Ars , Computer Engineering Laboratory, Delft University of Technology, the Netherlands
Koen Bertels , Computer Engineering Laboratory, Delft University of Technology, the Netherlands
pp. 266-269

A low voltage sigma delta modulator for temperature sensor (PDF)

Yi-Hsiang Juan , Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan
Ching-hsing Luo , Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan
Hong-Yi Huang , Graduate Institute of Electrical Engineering, National Taipei University, Taiwan
pp. 270-273

Developing a new phase noise estimation technique based on time varying model (PDF)

S. Izadpanah Tous , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
E. Mohamadi , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
M. Mousavi , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
R. Darvish Khalil Abadi , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
E. Kargaran , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
H. Nabovati , Department of Electrical Engineering, Sadjad Institute of higher Education, Mashhad, IRAN
pp. 274-277

Lightweight benchmarking of platforms for network traffic processing (PDF)

Pavol Korcek , Brno University of Technology, IT4Innovations Centre of Excellence, Bozetechova 2, Czech Republic
Martin Zadnik , Brno University of Technology, IT4Innovations Centre of Excellence, Bozetechova 2, Czech Republic
pp. 278-283

A new analog output buffer for data driver of active matrix displays using low-temperature polycrystalline silicon thin-film transistors (PDF)

I. Pappas , Electronics Lab, Physics Dept., Aristotle University of Thessaloniki, 54124, Greece
S. Siskos , Electronics Lab, Physics Dept., Aristotle University of Thessaloniki, 54124, Greece
A.A. Hatzopoulos , Dept. of Electrical and Computer Eng., Aristotle University of Thessaloniki, 54124, Greece
pp. 284-287

Combining on-line fault detection and logic self repair (PDF)

Tobias Koal , Computer Engineering Group, Brandenburg University of Technology Cottbus, D-03013, Germany
Markus Ulbricht , Computer Engineering Group, Brandenburg University of Technology Cottbus, D-03013, Germany
Heinrich T. Vierhaus , Computer Engineering Group, Brandenburg University of Technology Cottbus, D-03013, Germany
pp. 288-293

Online self-checking and correction for crosstalk-induced timing errors on VLSI interconnects (PDF)

Ping-Liang Lai , Department of Computer Science and Engineering, National Chung-Hsing University, NCHU, Taichung, Taiwan
Der-Chen Huang , Department of Computer Science and Engineering, National Chung-Hsing University, NCHU, Taichung, Taiwan
pp. 294-299

On test time reduction using pattern overlapping, broadcasting and on-chip decompression (PDF)

Martin Chloupek , Czech Technical University in Prague, Thakurova 9, Czech Republic
Ondrej Novak , Czech Technical University in Prague, Thakurova 9, Czech Republic
Jiri Jenicek , Technical University Liberec, Studentska 2, Czech Republic
pp. 300-305

A SBST strategy to test microprocessors' Branch Target Buffer (PDF)

P. Bernardi , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
L. Ciganda , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
M. Grosso , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
E. Sanchez , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
M. Sonza Reorda , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
pp. 306-311

An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores (PDF)

Mario Scholzel , Computer Engineering Group, Brandenburg University of Technology, Cottbus, Germany
Tobias Koal , Computer Engineering Group, Brandenburg University of Technology, Cottbus, Germany
Heinrich Theodor Vierhaus , Computer Engineering Group, Brandenburg University of Technology, Cottbus, Germany
pp. 312-317

CIVA: Custom instruction vulnerability analysis framework (PDF)

Ali Azarpeyvand , School of Electrical and Computer Engineering, University of Tehran, 14395-1515, Iran
Mostafa E. Salehi , School of Electrical and Computer Engineering, University of Tehran, 14395-1515, Iran
Seid Mehdi Fakhraie , School of Electrical and Computer Engineering, University of Tehran, 14395-1515, Iran
pp. 318-323

Automated debugging from pre-silicon to post-silicon (PDF)

Mehdi Dehbashi , Institute of Computer Science, University of Bremen, 28359, Germany
Gorschwin Fey , Institute of Computer Science, University of Bremen, 28359, Germany
pp. 324-329

On the use of assertions for embedded-software dynamic verification (PDF)

Giuseppe Di Guglielmo , University of Verona - Department of Computer Science, Italy
Luigi Di Guglielmo , University of Verona - Department of Computer Science, Italy
Franco Fummi , University of Verona - Department of Computer Science, Italy
Graziano Pravadelli , University of Verona - Department of Computer Science, Italy
pp. 330-335

Test platform for fault tolerant systems design properties verification (PDF)

Martin Straka , Brno University of Technology, Bozetechova 2, 61266, Czech Republic
Lukas Miculka , Brno University of Technology, Bozetechova 2, 61266, Czech Republic
Jan Kastil , Brno University of Technology, Bozetechova 2, 61266, Czech Republic
Zdenek Kotasek , Brno University of Technology, Bozetechova 2, 61266, Czech Republic
pp. 336-341

Reliability challenges in avionics due to silicon aging (PDF)

Behzad Mesgarzadeh , Linköping University, Sweden
Ingemar Soderquist Saab , Linköping - Sweden
Atila Alvandpour , Linköping University, Sweden
pp. 342-347

BTI impact on logical gates in nano-scale CMOS technology (PDF)

Seyab Khan , Computer Engineering Laboratory, Delft University of Technology, Mekelweg 4, 2628 CD, The Netherland
Said Hamdioui , Computer Engineering Laboratory, Delft University of Technology, Mekelweg 4, 2628 CD, The Netherland
Halil Kukner , Kapeldreef 75,B-3001, Leuven, Belgium
Praveen Raghavan , Kapeldreef 75,B-3001, Leuven, Belgium
Francky Catthoor , Kapeldreef 75,B-3001, Leuven, Belgium
pp. 348-353

On-chip aging sensor to monitor NBTI effect in nano-scale SRAM (PDF)

A. Ceratti , Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
T. Copetti , Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
L. Bolzani , Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
F. Vargas , Catholic University of Rio Grande do Sul (PUCRS), Porto Alegre, Brazil
pp. 354-359

Complementary edge alignment and digital output signal speed-up CMOS positive feedback latches (PDF)

Vladimir Milovanovic , Vienna University of Technology (TU Wien), Institute of Electrodynamics, Microwave and Circuit Engineering (EMCE), Gußhausstraße 25, 1040 Wien, Austria
Horst Zimmermann , Vienna University of Technology (TU Wien), Institute of Electrodynamics, Microwave and Circuit Engineering (EMCE), Gußhausstraße 25, 1040 Wien, Austria
pp. 360-365

Reconfigurable time interval measurement circuit incorporating a programmable gain time difference amplifier (PDF)

A. N. M. Alahmadi , School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, United Kingdom
G. Russell , School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, United Kingdom
A. Yakovlev , School of Electrical, Electronic and Computer Engineering, Newcastle University, Newcastle upon Tyne, United Kingdom
pp. 366-371

Efficient digital design for automotive mixed-signal ASICs using simulink (PDF)

Andreas Mauderer , Robert Bosch GmbH, Automotive Electronics, Tübinger Strasse 123, 72762 Reutlingen, Germany
Marvin Freier , Robert Bosch GmbH, Automotive Electronics, Tübinger Strasse 123, 72762 Reutlingen, Germany
Jan-Hendrik Oetjens , Robert Bosch GmbH, Automotive Electronics, Tübinger Strasse 123, 72762 Reutlingen, Germany
Wolfgang Rosenstiel , University of Tübingen, Department of Computer Engineering, Sand 13, 72074, Germany
pp. 372-377

VARMA—VARiability modelling and analysis tool (PDF)

G. Russell , School of Electrical, Electronic and Computer Engineering, Newcastle University, England UK
F. Burns , School of Electrical, Electronic and Computer Engineering, Newcastle University, England UK
A. Yakovlev , School of Electrical, Electronic and Computer Engineering, Newcastle University, England UK
pp. 378-383

[Blank page] (PDF)

pp. 384

Author index (PDF)

pp. 385-386

Testonica (PDF)

pp. 1
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