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2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) (2010)
Vienna, Austria
Apr. 14, 2010 to Apr. 16, 2010
ISBN: 978-1-4244-6612-2
TABLE OF CONTENTS
Papers

Foreword (PDF)

pp. 1

Self-repairing and tuning reconfigurable electronics for space (PDF)

Didier Keymeulen , Jet Propulsion Laboratory, California Institute of Technology, USA
pp. 1

Asynchronous design, Quo Vadis? (PDF)

Alex Yakovlev , Newcastle University, United Kingdom
pp. 3

Formal verification meets robustness checking — Techniques and challenges (PDF)

Gorschwin Fey , Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
Rolf Drechsler , Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
pp. 4
Papers

Advanced embedded memory testing: Reducing the defect per million level at lower test cost (PDF)

Ad J. van de Goor , Delft University of Technology, Computer Engineering Laboratory, Mekelweg 4, 2628 CD, Delft, The Netherlands
Said Hamdioui , Delft University of Technology, Computer Engineering Laboratory, Mekelweg 4, 2628 CD, Delft, The Netherlands
pp. 7

Automated simulation-based verification of power requirements for Systems-on-Chips (Abstract)

Christoph Trummer , Institute for Technical Informatics, Graz University of Technology, Austria
Damian Dalton , School of Computer Science and Informatics, University College Dublin, Ireland
Markus Pistauer , CISC Semiconductor Design+Consulting GmbH, Austria
Christian Steger , Institute for Technical Informatics, Graz University of Technology, Austria
Reinhold Weis , Institute for Technical Informatics, Graz University of Technology, Austria
Christoph M. Kirchsteiger , Institute for Technical Informatics, Graz University of Technology, Austria
pp. 8-11
Papers

Utilizing the Bulk-driven technique in analog circuit design (Abstract)

Dalibor Biolek , Department of Microelectronics, Brno University of Technology, Brno, Czech Republic
Nabhan Khatib , Department of Microelectronics, Brno University of Technology, Brno, Czech Republic
Fabian Khateb , Department of Microelectronics, Brno University of Technology, Brno, Czech Republic
Jiri Vavra , Department of Microelectronics, Brno University of Technology, Brno, Czech Republic
pp. 16-19
Papers

Automated SEU fault emulation using partial FPGA reconfiguration (Abstract)

Anton Biasizzo , Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia
Uros Legat , Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia
Franc Novak , Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia
pp. 24-27
Papers

Design of a single layer programmable Structured ASIC library (Abstract)

David W. L. Wu , Department of Computer Science and Engineering, The Chinese University of Hong Kong
Oliver C. S. Choy , Department of Electronic Engineering, The Chinese University of Hong Kong
Oscar K. L. Lau , Department of Electronic Engineering, The Chinese University of Hong Kong
Brian P. W. Chan , Department of Electronic Engineering, The Chinese University of Hong Kong
Sam M. H. Ho , Department of Electronic Engineering, The Chinese University of Hong Kong
Steve C. L. Yuen , Department of Electronic Engineering, The Chinese University of Hong Kong
Kong-Pang Pun , Department of Electronic Engineering, The Chinese University of Hong Kong
Philip H. W. Leong , School of Electrical and Information Engineering, University of Sydney, Australia
Yan-Qing Ai , Department of Electronic Engineering, The Chinese University of Hong Kong
Thomas C. P. Chau , Department of Computer Science and Engineering, The Chinese University of Hong Kong
pp. 32-35

On the mitigation of SET broadening effects in integrated circuits (Abstract)

Niccolo Battezzati , Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy
Luca Sterpone , Dip. di Automatica e Informatica, Politecnico di Torino, Torino - Italy
pp. 36-39
Papers

A low power low voltage mixer for 2.4GHz applications in CMOS-90nm technology (Abstract)

Adoracion Rueda , Instituto de Microelectrónica de Sevilla - Centro Nacional de Microelectrónica, Consejo Superior de Investigaciones Científicas (IMSE-CNM-CSIC) / Universidad de Sevilla, C/ Américo
Alberto Villegas , Instituto de Microelectrónica de Sevilla - Centro Nacional de Microelectrónica, Consejo Superior de Investigaciones Científicas (IMSE-CNM-CSIC) / Universidad de Sevilla, C/ Américo
Diego Vaquez , Instituto de Microelectrónica de Sevilla - Centro Nacional de Microelectrónica, Consejo Superior de Investigaciones Científicas (IMSE-CNM-CSIC) / Universidad de Sevilla, C/ Américo
pp. 44-47
Papers

Efficient mapping of nondeterministic automata to FPGA for fast regular expression matching (Abstract)

Vlastimil Kosar , CESNET, z.s.p.o. Zikova 4, 160 00, Prague, Czech Republic
Jan Korenek , Brno University of Technology Bozetechova 2, 612 66 Brno, Czech Republic
pp. 54-59

Data compression in hardware — The Burrows-Wheeler approach (Abstract)

S. Arming , Vienna University of Technology, Institute of Computer Engineering - Embedded Computing Systems Group, Treitlstraße 3, A-1040 Vienna, Austria
R. Fenkhuber , Vienna University of Technology, Institute of Computer Engineering - Embedded Computing Systems Group, Treitlstraße 3, A-1040 Vienna, Austria
T. Handl , Vienna University of Technology, Institute of Computer Engineering - Embedded Computing Systems Group, Treitlstraße 3, A-1040 Vienna, Austria
pp. 60-65

Software-based self-repair of statically scheduled superscalar data paths (Abstract)

Mario Scholzel , Department of Computer Science, Brandenburg University of Technology, Cottbus, Germany
pp. 66-71
Papers

A Build-In Self-Test technique for RF Mixers (Abstract)

Yiorgos Tsiatouhas , Dept. of Computer Science, University of Ioannina, Ioannina, Greece
Lambros Dermentzoglou , Dept. of Informatics and Telecommunications, University of Athens, Athens, Greece
Angela Arapoyanni , Dept. of Informatics and Telecommunications, University of Athens, Athens, Greece
pp. 88-92

Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors (Abstract)

Yngvar Berg , Nanoelectronics, Department of Informatics, University of Oslo, N-0316 Oslo, Norway
pp. 93-98

Combining de-stressing and self repair for long-term dependable systems (Abstract)

T. Koal , Brandenburg University of Technology Cottbus, Computer Engineering Group
H. T. Vierhaus , Brandenburg University of Technology Cottbus, Computer Engineering Group
pp. 99-104

Developing reconfigurable FIFOs to optimize power/performance of Voltage/Frequency Island-based networks-on-chip (Abstract)

Juha Plosila , Computer Systems Lab., Department of Information Technology, University of Turku, Finland
Amir-Mohammad Rahmani , Turku Centre for Computer Science (TUCS), Turku, Finland
Hannu Tenhunen , Turku Centre for Computer Science (TUCS), Turku, Finland
Pasi Liljeberg , Computer Systems Lab., Department of Information Technology, University of Turku, Finland
pp. 105-110

Exploration of the FlexRay signal integrity using a combined prototyping and simulation approach (Abstract)

Michael Karner , Graz University of Technology, Institute for Technical Informatics, Austria
Martin Krammer , The Virtual Vehicle Competence Center, Austria
Christian Steger , Graz University of Technology, Institute for Technical Informatics, Austria
Eric Armengaud , The Virtual Vehicle Competence Center, Austria
Reinhold Weiss , Graz University of Technology, Institute for Technical Informatics, Austria
Federico Clazzer , The Virtual Vehicle Competence Center, Austria
pp. 111-116

Self-Adaptive mechanism for cache memory reliability improvement (Abstract)

Mihai Udrescu , Department of Computer Science ¿Politehnica¿ University Timisoara, Romania
Mircea Vladutiu , Department of Computer Science ¿Politehnica¿ University Timisoara, Romania
Liviu Agnola , Department of Computer Science ¿Politehnica¿ University Timisoara, Romania
pp. 117-118
Papers

Reconfigurable hardware objects for image processing on FPGAs (Abstract)

Petr Honzik , Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
Jan Kloub , Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
Martin Danek , Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
pp. 121-122
Papers

Blind image deconvolution algorithm on NVIDIA CUDA platform (Abstract)

Jan Kamenicky , Department of Image Processing, Institute of Information Theory and Automation, Academy of Sciences of the Czech Republic
Tomas Mazanec , Department of Signal Processing, Institute of Information Theory and Automation, Academy of Sciences of the Czech Republic
Antonin Hermanek , Department of Signal Processing, Institute of Information Theory and Automation, Academy of Sciences of the Czech Republic
pp. 125-126
Papers

SystemC-AMS SDF model synthesis for exploration of heterogeneous architectures (Abstract)

Yannick Le Moullec , Center for Software Defined Radio, Department of Electronic Systems, Aalborg University, Denmark
Wolfgang Nebel , Carl von Ossietzky University Oldenburg, Faculty II - Department for Computer Science, Division Embedded HW/SW Systems, Oldenburg, Germany
Peter Koch , Center for Software Defined Radio, Department of Electronic Systems, Aalborg University, Denmark
Kim Griittner , OFFIS, R&D Division Transportation, Oldenburg, Germany
Andreas Popp , Center for Software Defined Radio, Department of Electronic Systems, Aalborg University, Denmark
Andreas Herrholz , OFFIS, R&D Division Transportation, Oldenburg, Germany
pp. 133-138

A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip (Abstract)

Pasi Liljeberg , Department of Information Technology, University of Turku, Turku, Finland
Mojtaba Valinataj , School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
Siamak Mohammadi , School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
Juha Plosila , Department of Information Technology, University of Turku, Turku, Finland
pp. 139-144

Current Sensing Completion Detection in deep sub-micron technologies (Abstract)

Lukas Nagy , Department of Microelectronics, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjakova , Department of Microelectronics, Slovak University of Technology, Bratislava, Slovakia
pp. 145-148

Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing (Abstract)

Jan Kastil , Faculty of Information Technology, Brno University of Technology, Bozetechova 2, Brno, 612 66, Czech Republic
Jan Korenek , Faculty of Information Technology, Brno University of Technology, Bozetechova 2, Brno, 612 66, Czech Republic
pp. 149-152

Combined matched filter and arbitrary interpolator for symbol timing synchronization in SDR receivers (Abstract)

Mehmood-ur-Rehman Awan , Center for Software Defined Radio, Department of Electronic Systems, Aalborg University, Denmark
Peter Koch , Center for Software Defined Radio, Department of Electronic Systems, Aalborg University, Denmark
pp. 153-156

A 3–5GHz UWB CMOS receiver with digital control technique (Abstract)

Mengmeng Liu , State Key Laboratory on Microwave and Digital Communications, Department of Microelectronics, Electronic Engineering Tsinghua University, Beijing, China
Bo Han , State Key Laboratory on Microwave and Digital Communications, Department of Microelectronics, Electronic Engineering Tsinghua University, Beijing, China
Ning Ge , State Key Laboratory on Microwave and Digital Communications, Department of Microelectronics, Electronic Engineering Tsinghua University, Beijing, China
pp. 157-160

Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits (Abstract)

Doug Edwards , School of Computer Science, The University of Manchester, Manchester, M13 9PL, UK
Zheng Xie , School of Computer Science, The University of Manchester, Manchester, M13 9PL, UK
pp. 161-166

Buffer-ring-based all-digital on-chip monitor for PMOS and NMOS process variability and aging effects (Abstract)

Kunihiro Asada , VLSI Design and Education Center (VDEC), University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
Toru Nakura , VLSI Design and Education Center (VDEC), University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
Tetsuya Iizuka , VLSI Design and Education Center (VDEC), University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
pp. 167-172

Modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs (Abstract)

Martin Straka , Faculty of Information Technology, Brno University of Technology, Bozetechova 2, Brno, 612 66, Czech Republic
Jan Kastil , Faculty of Information Technology, Brno University of Technology, Bozetechova 2, Brno, 612 66, Czech Republic
Zdenek Kotasek , Faculty of Information Technology, Brno University of Technology, Bozetechova 2, Brno, 612 66, Czech Republic
pp. 173-176

Testing analog electronic circuits using N-terminal network (Abstract)

Piotr Kyziol , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
Jerzy Rutkowski , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
Damian Grzechca , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
pp. 177-180

The novel approach to wideband RFIC receivers in standard CMOS process (Abstract)

Libor Majer , Department of Microelectronics, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjakova , Department of Microelectronics Slovak University of Technology, Bratislava, Slovakia
pp. 181-184
Papers

Tree-model based mapping for energy-efficient and low-latency Network-on-Chip (Abstract)

Thomas Canhao Xu , Department of Information Technology, University of Turku, Joukahaisenkatu 3-5B, Turku 20520, Finland
Tero Santti , Department of Information Technology, University of Turku, Joukahaisenkatu 3-5B, Turku 20520, Finland
Bo Yang , Department of Information Technology, University of Turku, Joukahaisenkatu 3-5B, Turku 20520, Finland
Juha Plosila , Department of Information Technology, University of Turku, Joukahaisenkatu 3-5B, Turku 20520, Finland
pp. 189-192
Papers

A synthesis method to propagate false path information from RTL to gate level (Abstract)

Satoshi Ohtake , Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara 630-0192, Japan
Hideo Fujiwara , Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara 630-0192, Japan
Hiroshi Iwata , Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara 630-0192, Japan
pp. 197-200

How to reduce size of a signature-based diagnostic dictionary used for testing of connections (Abstract)

Hlawiczka Andrzej , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
Gucwa Krzysztof , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
Garbolino Tomasz , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
pp. 201-204
Papers

A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS (Abstract)

Franz Kuttner , Infineon Technologies Austria AG, Siemensstraße 2, 9500 Villach
Horst Zimmermann , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstraße 25/354, Austria, 1040 Vienna
Kurt Schweiger , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstraße 25/354, Austria, 1040 Vienna
Lukas Dorrer , Infineon Technologies Austria AG, Siemensstraße 2, 9500 Villach
Heimo Uhrmann , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstraße 25/354, Austria, 1040 Vienna
pp. 209-212
Papers

Intelligent IGBT driver concept for three-phase electric drive diagnostics (Abstract)

B. Klima , Department of Power Electrical and Electronic Engineering, Faculty of Electrical Engineering and Communication, Brno University of Technology, Brno, Czech Republic
M. Pochyla , Department of Power Electrical and Electronic Engineering, Faculty of Electrical Engineering and Communication, Brno University of Technology, Brno, Czech Republic
J. Knobloch , Department of Power Electrical and Electronic Engineering, Faculty of Electrical Engineering and Communication, Brno University of Technology, Brno, Czech Republic
pp. 217-220

Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing (Abstract)

Axel Jantsch , Royal Institute of Technology, Stockholm, Sweden
Amr Helmy , TIMA Laboratory (CNRS, GrenobleINP, UJF), Grenoble, France
Laurence Pierre , TIMA Laboratory (CNRS, GrenobleINP, UJF), Grenoble, France
pp. 221-224

NoGap<sup>CL</sup>: A flexible common language for processor hardware description (Abstract)

Wenbiao Zhou , Department of EE, Linköping university, Linköping
Per Karlstrom , Department of EE, Linköping university, Linköping
Dake Liu , Department of EE, Linköping university, Linköping
pp. 225-228
Papers

Enhancing pipelined processor architectures with fast autonomous recovery of transient faults (Abstract)

Jakob Lechner , Institute of Computer Engineering, Vienna University of Technology, Vienna, Austria
Marcus Jeitler , Institute of Computer Engineering, Vienna University of Technology, Vienna, Austria
Andreas Steininger , Institute of Computer Engineering, Vienna University of Technology, Vienna, Austria
pp. 233-236

Instruction set extensions for multi-threading in LEON3 (Abstract)

J. Sykora , Department of Signal Processing, UTIA AV CR, Pod vodarenskou vezi 4, Praha 8, 182 08, Czech Republic
M. Danek , Department of Signal Processing, UTIA AV CR, Pod vodarenskou vezi 4, Praha 8, 182 08, Czech Republic
L. Kohout , Department of Signal Processing, UTIA AV CR, Pod vodarenskou vezi 4, Praha 8, 182 08, Czech Republic
L. Kafka , Department of Signal Processing, UTIA AV CR, Pod vodarenskou vezi 4, Praha 8, 182 08, Czech Republic
pp. 237-242

Wrapper design for a CDMA bus in SOC (Abstract)

Z. Stamenkovic , System Design, IHP GmbH, Frankfurt (Oder), Germany
T. Nikolic , Faculty of Electronic Engineering, University of Niš, Niš, Serbia
M. Stojcev , Faculty of Electronic Engineering, University of Niš, Niš, Serbia
pp. 243-248

Evaluation of Radix-2 and Radix-4 FFT processing on a reconfigurable platform (Abstract)

Fabio Garzia , Department of Computer Systems, Tampere University of Technology, P. O. Box 553, FIN-33101, Tampere, Finland
Jari Nurmi , Department of Computer Systems, Tampere University of Technology, P. O. Box 553, FIN-33101, Tampere, Finland
Waqar Hussain , Department of Computer Systems, Tampere University of Technology, P. O. Box 553, FIN-33101, Tampere, Finland
pp. 249-254

Using a CISC microcontroller to test embedded memories (Abstract)

Ad van de Goor , ComTex, Gouda, The Netherlands
Georgi Gaydadjiev , Computer Engineering, TU Delft, The Netherlands
Said Hamdioui , Computer Engineering, TU Delft, The Netherlands
pp. 261-266

Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS (Abstract)

Amir Hasanbegovic , Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway
Snorre Aunet , Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway
pp. 267-272

Evaluation of transition untestable faults using a multi-cycle capture test generation method (Abstract)

Toshinori Hosokawa , College of Industrial Technology Nihon University, Narashino, Chiba 275-8575, Japan
Hiroshi Ogawa , Graduate School of Industrial Technology, Nihon University, Narashino, Chiba 275-8575, Japan
Masayoshi Yoshimura , Faculty of Information Science and Electrical Engineering, Kyushu University, Nishi-ku, Fukuoka, 814-0001, Japan
Koji Yamazaki , School of Information and Communication, Meiji University, Suginami-ku, Tokyo 168-8555, Japan
pp. 273-276

On analysis of fabricated polymorphic circuits (Abstract)

Vaclav Simek , Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic
Richard Ruzicka , Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic
Lukas Sekanina , Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic
pp. 281-284

A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop (Abstract)

Hong-Yi Huang , Graduate Institute of Electrical Engineering, National Taipei University, Taiwan
Chang-Chien Hu , Department of Electrical Engineering, National Central University, Taiwan
Jen-Chieh Liu , Department of Electrical Engineering, National Central University, Taiwan
Kuo-Hsing Cheng , Department of Electrical Engineering, National Central University, Taiwan
pp. 285-288

A hardware accelerated framework for the generation of design validation programs for SMT processors (Abstract)

M. Sonza Reorda , Politecnico di Torino - Dipartimento di Automatica e Informatica, Torino, Italy
D. Ravotto , Politecnico di Torino - Dipartimento di Automatica e Informatica, Torino, Italy
E. Sanchez , Politecnico di Torino - Dipartimento di Automatica e Informatica, Torino, Italy
pp. 289-292

Non-disjoint decomposition of logic functions in Reed-Muller spectral domain (Abstract)

Stefan Kolodzinski , Pratt&Whitney, Kalisz, Poland
Edward Hrynkiewicz , Institute of Electronics, Silesian University of Technology, Gliwice, Poland
pp. 293-296
Papers

A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks (Abstract)

Abderrazek Abdaoui , Institue Charles Delaunay (ICD), STMR, UMR CNRS 6279. Laboratoire de modélisation et SÛreté des Systèmes (LM2S), Université de Technologie de Troyes (UTT), 12, rue Marie-Curie, 100
Eric Chatelet , Institue Charles Delaunay (ICD), STMR, UMR CNRS 6279. Laboratoire de modélisation et SÛreté des Systèmes (LM2S), Université de Technologie de Troyes (UTT), 12, rue Marie-Curie, 100
Abderrahim Doumar , Institue Charles Delaunay (ICD), STMR, UMR CNRS 6279. Laboratoire de modélisation et SÛreté des Systèmes (LM2S), Université de Technologie de Troyes (UTT), 12, rue Marie-Curie, 100
Farid Lahrach , Institue Charles Delaunay (ICD), STMR, UMR CNRS 6279. Laboratoire de modélisation et SÛreté des Systèmes (LM2S), Université de Technologie de Troyes (UTT), 12, rue Marie-Curie, 100
pp. 305-308

Simulation-based sensitivity and worst-case analyses of automotive electronics (Abstract)

Georg Pelz , Automotive Power, Infineon AG, Neubiberg, Germany
Monica Rafaila , Automotive Power, Infineon AG, Neubiberg, Germany
Christoph Grimm , Vienna University of Technology, Vienna, Austria
Christian Decker , Automotive Power, Infineon AG, Neubiberg, Germany
pp. 309-312

Synthesizing simulators for model checking microcontroller binary code (Abstract)

Dominique Guckel , Embedded Software Laboratory, RWTH Aachen University, Ahornstraße 55, 52074, Aachen, Germany
Stefan Kowalewski , Embedded Software Laboratory, RWTH Aachen University, Ahornstraße 55, 52074, Aachen, Germany
Bastian Schlich , Embedded Software Laboratory, RWTH Aachen University, Ahornstraße 55, 52074, Aachen, Germany
Jorg Brauer , Embedded Software Laboratory, RWTH Aachen University, Ahornstraße 55, 52074, Aachen, Germany
pp. 313-316

A deterministic approach for hardware fault injection in asynchronous QDI logic (Abstract)

Thomas Panhofer , Institute of Computer Engineering, Vienna University of Technology, Austria
Andreas Steininger , Institute of Computer Engineering, Vienna University of Technology, Austria
Werner Friesenbichler , Institute of Computer Engineering, Vienna University of Technology, Austria
pp. 317-322
Papers

Synthesis of asynchronous monitors for critical electronic systems (Abstract)

Alexandre Porcher , TIMA Laboratory, INPG/UJF/CNRS, 46 Avenue F. Viallet, 38031 Grenoble Cedex, France
Laurent Fesquet , TIMA Laboratory, INPG/UJF/CNRS, 46 Avenue F. Viallet, 38031 Grenoble Cedex, France
Katell Morin-Allory , TIMA Laboratory, INPG/UJF/CNRS, 46 Avenue F. Viallet, 38031 Grenoble Cedex, France
pp. 329-334
Papers

Window optimization of reversible and quantum circuits (Abstract)

Rolf Drechsler , Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
Gerhard W. Dueck , Faculty of Computer Science, University of New Brunswick, Fredericton, Canada
Robert Wille , Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
Mathias Soeken , Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
pp. 341-345

On logic synthesis of conventionally hard to synthesize circuits using genetic programming (Abstract)

Jan Schmidt , Faculty of Information Technology, Czech Technical University in Prague, Prague, Czech Republic
Petr Fiser , Faculty of Information Technology, Czech Technical University in Prague, Prague, Czech Republic
Zdenek Vasicek , Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic
Lukas Sekanina , Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic
pp. 346-351

Constraint-based test pattern generation at the Register-Transfer Level (Abstract)

Anna Krivenko , Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia
Jaan Raik , Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia
Raimund Ubar , Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia
Taavi Viilukas , Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia
Maksim Jenihhin , Tallinn University of Technology, Raja 15, 12618 Tallinn, Estonia
pp. 352-357
Papers

Reduction of power dissipation through parallel optimization of test vector and scan register sequences (Abstract)

Jaroslav Skarvada , Brno University of Technology, Faculty of Information Technology, Božet¿chova 2, 61266 Brno, Czech Republic
Josef Strnadel , Brno University of Technology, Faculty of Information Technology, Božet¿chova 2, 61266 Brno, Czech Republic
Zdenek Kotasek , Brno University of Technology, Faculty of Information Technology, Božet¿chova 2, 61266 Brno, Czech Republic
pp. 364-369

Comparison of jitter decomposition methods for BER analysis of high-speed serial links (Abstract)

Stefan Erb , Institute of Electronics - Graz University of Technology, Inffeldgasse 12/I, 8010 Graz, Austria
Wolfgang Pribyl , Institute of Electronics - Graz University of Technology, Inffeldgasse 12/I, 8010 Graz, Austria
pp. 370-375

Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes (Abstract)

A. Bosio , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
L. Dilillo , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
W. Zhao , University of Connecticut, Storrs, CT, USA
A. Virazel , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
X. Wen , Kyushu Institute of Technology, Iizuka, Fukuoka, Japan
P. Girard , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
S. Pravossoudovitch , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
M. Tehranipoor , University of Connecticut, Storrs, CT, USA
F. Wu , Dept. of Microelectronic, LIRMM, University of Montpellier II / CNRS, Montpellier, France
J. Ma , University of Connecticut, Storrs, CT, USA
pp. 376-381

Low-cost, customized and flexible SRAM MBIST engine (Abstract)

Georgi Gaydadjiev , Computer Engineering, TU Delft, The Netherlands
Said Hamdioui , Computer Engineering, TU Delft, The Netherlands
Christian Jung , Micronas, Freiburg, Germany
Ad van de Goor , ComTex, Gouda, The Netherlands
pp. 382-387

Decoupling capacitance study and optimization method for high-performance VLSIs (Abstract)

Q. K. Zhu , Chameleon Systems Inc., 7848 Pineville Circle, Castro Valley, CA 94552, USA
T. Mozdzen , Chameleon Systems Inc., 7848 Pineville Circle, Castro Valley, CA 94552, USA
J. Yong , Chameleon Systems Inc., 7848 Pineville Circle, Castro Valley, CA 94552, USA
pp. 388-392

Versatile sub-bandgap reference IP core (Abstract)

Tomas Urban , Department of Circuit Theory, Faculty of Electrical Engineering CTU Prague, Technická 2, 166 27 Prague, Czech Republic
Pravoslav Martinek , Department of Circuit Theory, Faculty of Electrical Engineering CTU Prague, Technická 2, 166 27 Prague, Czech Republic
Ondrej Subrt , Department of Circuit Theory, Faculty of Electrical Engineering CTU Prague, Technická 2, 166 27 Prague, Czech Republic
pp. 393-398

A 12-bit fully differential 2MS/s successive approximation analog-to-digital converter with reduced power consumption (Abstract)

H. Zimmermann , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstrasse 25/E354 Austria, 1040 Vienna
G. Zach , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstrasse 25/E354 Austria, 1040 Vienna
M. Davidovic , Institute of Electrodynamics, Microwave and Circuit Engineering, Vienna University of Technology, Gusshausstrasse 25/E354 Austria, 1040 Vienna
pp. 399-402
Papers

Author index (PDF)

pp. 406-407
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