The Community for Technology Leaders
Design, Automation & Test in Europe Conference & Exhibition (2010)
Dresden Germany
Mar. 8, 2010 to Mar. 12, 2010
ISSN: 1530-1591
ISBN: 978-1-4244-7054-9
TABLE OF CONTENTS

Statistical SRAM analysis for yield enhancement (Abstract)

Paul Zuber , Digital Components, IMEC-Belgium
Miguel Miranda , Digital Components, IMEC-Belgium
Petr Dobrovolny , Digital Components, IMEC-Belgium
Koen van der Zanden , Digital Components, IMEC-Belgium
Jong-Hoon Jung , Design Technology Team, System LSI Division, Samsung Electronics Co.-Korea
pp. 57-62

Scenario extraction for a refined timing-analysis of automotive network topologies (Abstract)

Matthias Traub , Daimler AG, Research and Advanced Engineering, D-71059 Sindelfingen, Germany
Thilo Streichert , Daimler AG, Research and Advanced Engineering, D-71059 Sindelfingen, Germany
Oleg Krasovytskyy , Daimler AG, Research and Advanced Engineering, D-71059 Sindelfingen, Germany
Jurgen Becker , Karlsruhe Institute of Technology, Institute for Information Processing Technology (ITIV), Germany
pp. 81-86

Efficient OpenMP data mapping for multicore platforms with vertically stacked memory (Abstract)

Andrea Marongiu , DEIS - University of Bologna, Viale Risorgimento, 2 - 40136 - Italy
Martino Ruggiero , DEIS - University of Bologna, Viale Risorgimento, 2 - 40136 - Italy
Luca Benini , DEIS - University of Bologna, Viale Risorgimento, 2 - 40136 - Italy
pp. 105-110

Evaluation and design exploration of solar harvested-energy prediction algorithm (Abstract)

Mustafa Imran Ali , School of Electronics and Computer Science, University of Southampton, UK
Bashir M. Al-Hashimi , School of Electronics and Computer Science, University of Southampton, UK
Joaquin Recas , DACYA, Complutense University, Madrid, Spain
David Atienza , Embedded Systems Laboratory, Ecole Polytechnique Fédérale de Lausanne, Switzerland
pp. 142-147

Spinto: High-performance energy minimization in spin glasses (Abstract)

Hector J. Garcia , The University of Michigan, 2260 Hayward Street, Ann Arbor, 48109-2121, USA
Igor L. Markov , The University of Michigan, 2260 Hayward Street, Ann Arbor, 48109-2121, USA
pp. 160-165

Constant-time admission control for Deadline Monotonic tasks (Abstract)

Alejandro Masrur , Institute for Real-Time Computer Systems, TU Munich, Germany
Samarjit Chakraborty , Institute for Real-Time Computer Systems, TU Munich, Germany
Georg Farber , Institute for Real-Time Computer Systems, TU Munich, Germany
pp. 220-225

Challenges in the design of automotive software (Abstract)

Simon Furst , BMW Group, 80788 Munich, Germany
pp. 256-258

Timing modeling for digital sub-threshold circuits (Abstract)

Niklas Lotze , University of Freiburg - IMTEK, Department of Microsystems Engineering, Laboratory for Microelectronics, Germany
Jacob Goppert , University of Freiburg - IMTEK, Department of Microsystems Engineering, Laboratory for Microelectronics, Germany
Yiannos Manoli , University of Freiburg - IMTEK, Department of Microsystems Engineering, Laboratory for Microelectronics, Germany
pp. 299-302

A systematic approach to the test of combined HW/SW systems (Abstract)

Alexander Krupp , Paderborn University / C-LAB, Germany
Wolfgang Muller , Paderborn University / C-LAB, Germany
pp. 323-326

A new approach for adaptive failure diagnostics based on emulation test (Abstract)

S. Ostendorff , Integrated Hard- and Software Systems Group, Ilmenau University of Technology, POB 10 05 65, 98684 Ilmenau, Germany
H.-D. Wuttke , Integrated Hard- and Software Systems Group, Ilmenau University of Technology, POB 10 05 65, 98684 Ilmenau, Germany
J. Sachsse , Integrated Hard- and Software Systems Group, Ilmenau University of Technology, POB 10 05 65, 98684 Ilmenau, Germany
S. Kohler , Boundary Scan Division, GÖPEL electronic GmbH, Göschwitzer Str. 58/60, 07745 Jena, Germany
pp. 327-330

Run-time spatial resource management for real-time applications on heterogeneous MPSoCs (Abstract)

Timon D. ter Braak , Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
Philip K.F. Holzenspies , Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
Jan Kuper , Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
Johann L. Hurink , Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
Gerard J.M. Smit , Department of Electrical Engineering, Mathematics and Computer Science, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
pp. 357-362

Automatic workload generation for system-level exploration based on modified GCC compiler (Abstract)

Jari Kreku , VTT Technical Research Center of Finland, Kaitoväylä 1, FI-90570 Oulu, Finland
Kari Tiensyrja , VTT Technical Research Center of Finland, Kaitoväylä 1, FI-90570 Oulu, Finland
Geert Vanmeerbeeck , IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
pp. 369-374

A rapid prototyping system for error-resilient multi-processor systems-on-chip (Abstract)

Matthias May , Microelectronic Systems Design, Research Group, University of Kaiserslautern, 67663, Germany
Norbert Wehn , Microelectronic Systems Design, Research Group, University of Kaiserslautern, 67663, Germany
Abdelmajid Bouajila , Institute for Integrated Systems, Technische Universität München, Arcisstr 21, 80290, Germany
Johannes Zeppenfeld , Institute for Integrated Systems, Technische Universität München, Arcisstr 21, 80290, Germany
Walter Stechele , Institute for Integrated Systems, Technische Universität München, Arcisstr 21, 80290, Germany
Andreas Herkersdorf , Institute for Integrated Systems, Technische Universität München, Arcisstr 21, 80290, Germany
Daniel Ziener , Hardware/Software Co-Design, Department of Computer Science, University of Erlangen-Nuremberg, 91058, Germany
Jurgen Teich , Hardware/Software Co-Design, Department of Computer Science, University of Erlangen-Nuremberg, 91058, Germany
pp. 375-380

Application-specific memory performance of a heterogeneous reconfigurable architecture (Abstract)

Sean Whitty , Institute of Computer and Network Engineering, Technische Universität Braunschweig, 38106, Germany
Henning Sahlbach , Institute of Computer and Network Engineering, Technische Universität Braunschweig, 38106, Germany
Brady Hurlburt , Institute of Computer and Network Engineering, Technische Universität Braunschweig, 38106, Germany
Rolf Ernst , Institute of Computer and Network Engineering, Technische Universität Braunschweig, 38106, Germany
Wolfram Putzke-Roming , Deutsche Thomson OHG, 30625 Hannover, Germany
pp. 387-392

HORUS - high-dimensional Model Order Reduction via low moment-matching upgraded sampling (Abstract)

Jorge Fernandez Villena , INESC ID / IST - TU Lisbon. Rua Alves Redol 9, 1000-029, Portugal
Luis Miguel Silveira , INESC ID / IST - TU Lisbon. Rua Alves Redol 9, 1000-029, Portugal
pp. 465-470

Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation (Abstract)

Matthias Muller , Wilhelm-Schickard-Institute for Computer Science, Department of Computer Engineering, University of Tübingen, Sand 13, 72076, Germany
Axel Braun , Wilhelm-Schickard-Institute for Computer Science, Department of Computer Engineering, University of Tübingen, Sand 13, 72076, Germany
Joachim Gerlach , Wilhelm-Schickard-Institute for Computer Science, Department of Computer Engineering, University of Tübingen, Sand 13, 72076, Germany
Wolfgang Rosenstiel , Wilhelm-Schickard-Institute for Computer Science, Department of Computer Engineering, University of Tübingen, Sand 13, 72076, Germany
Dennis Nienhuser , Intelligent Systems and Production Engineering, FZI Forschungszentrum Informatik, Haid-und-Neu-Str. 10-14, 76131 Karlsruhe, Germany
J. Marius Zollner , Intelligent Systems and Production Engineering, FZI Forschungszentrum Informatik, Haid-und-Neu-Str. 10-14, 76131 Karlsruhe, Germany
Oliver Bringmann , Intelligent Systems and Production Engineering, FZI Forschungszentrum Informatik, Haid-und-Neu-Str. 10-14, 76131 Karlsruhe, Germany
pp. 532-537

Non-intrusive virtualization management using libvirt (Abstract)

Matthias Bolte , Paderborn Center for Parallel Computing PC2, University of Paderborn, Fürstenallee 11, 33102, Germany
Michael Sievers , Paderborn Center for Parallel Computing PC2, University of Paderborn, Fürstenallee 11, 33102, Germany
Georg Birkenheuer , Paderborn Center for Parallel Computing PC2, University of Paderborn, Fürstenallee 11, 33102, Germany
Oliver Niehorster , Paderborn Center for Parallel Computing PC2, University of Paderborn, Fürstenallee 11, 33102, Germany
Andre Brinkmann , Paderborn Center for Parallel Computing PC2, University of Paderborn, Fürstenallee 11, 33102, Germany
pp. 574-579

Optimized self-tuning for circuit aging (Abstract)

Evelyn Mintarno , Stanford University, CA, USA
Joelle Skaf , Stanford University, CA, USA
Rui Zheng , Arizona State University, USA
Jyothi Velamala , Arizona State University, USA
Yu Cao , Arizona State University, USA
Stephen Boyd , Stanford University, CA, USA
Robert W. Dutton , Stanford University, CA, USA
Subhasish Mitra , Stanford University, CA, USA
pp. 586-591

High-speed clock recovery for low-cost FPGAs (Abstract)

Istvan Haller , Computer Science Department, Technical University of Cluj-Napoca, Romania
Zoltan Francisc Baruch , Computer Science Department, Technical University of Cluj-Napoca, Romania
pp. 610-613

Demonstration of an in-band reconfiguration data distribution and network node reconfiguration (Abstract)

Uwe Pross , Core Mountains GmbH, Chemnitz, Germany
Sebastian Goller , Core Mountains GmbH, Chemnitz, Germany
Erik Markert , Chair Circuit and System Design, Chemnitz University of Technology, Germany
Michael Juttner , Chair Circuit and System Design, Chemnitz University of Technology, Germany
Jan Langer , Chair Circuit and System Design, Chemnitz University of Technology, Germany
Ulrich Heinkel , Chair Circuit and System Design, Chemnitz University of Technology, Germany
Joachim Knablein , Alcatel-Lucent, Nuremberg, Germany
Axel Schneider , Alcatel-Lucent, Nuremberg, Germany
pp. 614-617

A methodology for the characterization of process variation in NoC links (Abstract)

Carles Hernandez , Universidad Politécnica de Valencia, Grupo de Architecturas Paralelas, Departamento de Informática de Sistemas, Camino de Vera s/n 46022, España
Federico Silla , Universidad Politécnica de Valencia, Grupo de Architecturas Paralelas, Departamento de Informática de Sistemas, Camino de Vera s/n 46022, España
Jose Duato , Universidad Politécnica de Valencia, Grupo de Architecturas Paralelas, Departamento de Informática de Sistemas, Camino de Vera s/n 46022, España
pp. 685-690

HW/SW co-detection of transient and permanent faults with fast recovery in statically scheduled data paths (Abstract)

Mario Scholzel , Department of Computer Science, Brandenburg University of Technology, Cottbus, Germany
pp. 723-728

KL-Cuts: A new approach for logic synthesis targeting multiple output blocks (Abstract)

Osvaldo Martinello , Institute of Informatics, Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Felipe S. Marques , Institute of Informatics, Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Renato P. Ribas , Institute of Informatics, Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
Andre I. Reis , Institute of Informatics, Federal University of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
pp. 777-782

Low power design of the X-GOLD® SDR 20 baseband processor (Abstract)

Wolfgang Raab , Infineon Technologies AG, Germany
Jorg Berthold , Infineon Technologies AG, Germany
Ulrich Hachmann , Infineon Technologies AG, Germany
Dominik Langen , Infineon Technologies AG, Germany
Michael Schreiner , Infineon Technologies AG, Germany
Holger Eisenreich , TU Dresden, Germany
Jens-Uwe Schluessler , TU Dresden, Germany
Georg Ellguth , TU Dresden, Germany
pp. 792-793

KAHRISMA: A Novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array Architecture (Abstract)

Ralf Koenig , Karlsruhe Institute of Technology, Germany
Lars Bauer , Karlsruhe Institute of Technology, Germany
Timo Stripf , Karlsruhe Institute of Technology, Germany
Muhammad Shafique , Karlsruhe Institute of Technology, Germany
Waheed Ahmed , Karlsruhe Institute of Technology, Germany
Juergen Becker , Karlsruhe Institute of Technology, Germany
Jorg Henkel , Karlsruhe Institute of Technology, Germany
pp. 819-824

Increasing PCM main memory lifetime (Abstract)

Alexandre P. Ferreira , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
Miao Zhou , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
Santiago Bock , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
Bruce Childers , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
Rami Melhem , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
Daniel Mosse , Department of Computer Science, University of Pittsburgh, Pennsylvania USA
pp. 914-919

Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithm (Abstract)

Andhi Janapsatya , School of Computer Science & Engineering, University of New South Wales, Sydney, 2052, Australia
Aleksandar Ignjatovic , NICTA, Sydney, NSW 2052, Australia
Jorgen Peddersen , School of Computer Science & Engineering, University of New South Wales, Sydney, 2052, Australia
Sri Parameswaran , NICTA, Sydney, NSW 2052, Australia
pp. 920-925

PANEL SESSION - Who Is Closing the embedded software design gap? (PDF)

W. Ecker , Infineon, DE
Pierre Bricaud , Synopsys, FR
Rainer Doemer , UC Irvine, US
Yossi Veller , Mentor Graphics, US
Stefan Heinen , Infineon, DE
Jurgen Mossinger , Bosch, DE
Andreas von Schwerin , Siemens, DE
pp. 932

RMOT: Recursion in model order for task execution time estimation in a software pipeline (Abstract)

Nabeel Iqbal , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
M. Adnan Siddique , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
Jorg Henkel , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
pp. 953-956

Increasing the power efficiency of PCs by improving the hardware/OS interaction (Abstract)

Chris Schlager , Operating System Research Center, AMD, USA
pp. 1005

Vision for cross-layer optimization to address the dual challenges of energy and reliability (Abstract)

Andre DeHon , Electrical and Systems Engineering, University of Pennsylvania, 200 S. 33rd St., Philadelphia, 19104, USA
Heather M. Quinn , Los Alamos National Laboratory, ISR-3 Space Data Systems, NM 87545, USA
Nicholas P. Carter , Intel Corporation, 2200 Mission College Blvd, RNB6-61, Santa Clara, California 95054, USA
pp. 1017-1022

An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique (Abstract)

Bo Liu , ESAT-MICAS, Katholieke Universiteit Leuven, Belgium
Francisco V. Fernandez , IMSE, CSIC and University of Sevilla, Spain
Georges Gielen , ESAT-MICAS, Katholieke Universiteit Leuven, Belgium
pp. 1106-1111

Efficient High-Level modeling in the networking domain (Abstract)

Christian Zebelein , University of Erlangen-Nuremberg, Germany
Joachim Falk , University of Erlangen-Nuremberg, Germany
Christian Haubelt , University of Erlangen-Nuremberg, Germany
Jurgen Teich , University of Erlangen-Nuremberg, Germany
Rainer Dorsch , IBM Research & Development GmbH, Germany
pp. 1189-1194

Differential Power Analysis enhancement with statistical preprocessing (Abstract)

Victor Lomne , LIRMM, UMR 5506, University Montpellier 2 - CNRS, 161, rue Ada, 34392, France
Amine Dehbaoui , LIRMM, UMR 5506, University Montpellier 2 - CNRS, 161, rue Ada, 34392, France
Philippe Maurine , LIRMM, UMR 5506, University Montpellier 2 - CNRS, 161, rue Ada, 34392, France
Lionel Torres , LIRMM, UMR 5506, University Montpellier 2 - CNRS, 161, rue Ada, 34392, France
Michel Robert , LIRMM, UMR 5506, University Montpellier 2 - CNRS, 161, rue Ada, 34392, France
pp. 1301-1304

Formal verification of analog circuits in the presence of noise and process variation (Abstract)

Rajeev Narayanan , Dept. of Electrical and Computer Engineering, Concordia University, Montreal, Quebec, Canada
Behzad Akbarpour , Dept. of Electrical and Computer Engineering, Concordia University, Montreal, Quebec, Canada
Mohamed H. Zaki , Dept. of Computer Science, University of British Columbia, Vancouver, Canada
Sofiene Tahar , Dept. of Electrical and Computer Engineering, Concordia University, Montreal, Quebec, Canada
Lawrence C. Paulson , Computer Laboratory, University of Cambridge, UK
pp. 1309-1312

Toward optimized code generation through model-based optimization (Abstract)

Asma Charfi , CEA LIST, Laboratory of model driven engineering for embedded systems, Point Courrier 94, F-91191, Gif sur Yvette, France
Chokri Mraidha , CEA LIST, Laboratory of model driven engineering for embedded systems, Point Courrier 94, F-91191, Gif sur Yvette, France
Sebastien Gerard , CEA LIST, Laboratory of model driven engineering for embedded systems, Point Courrier 94, F-91191, Gif sur Yvette, France
Francois Terrier , CEA LIST, Laboratory of model driven engineering for embedded systems, Point Courrier 94, F-91191, Gif sur Yvette, France
Pierre Boulet , Université Lille 1, Sciences et Technologies, cité scientifique, 59655, Villeneuve d'Ascq Cedex, France
pp. 1313-1316

SCOC3: a space computer on a chip (Abstract)

Franck Koebel , EADS Astrium Satellite, CoC Electronic France, Elancourt, France
Jean-Francois Coldefy , EADS Astrium Satellite, CoC Electronic France, Elancourt, France
pp. 1345-1348

Optimizing Data-Flow Graphs with min/max, adding and relational operations (Abstract)

J. Perez , GIM (www.teisa.unican.es/gim), TEISA, University of Cantabria, Santander, Spain
P. Sanchez , GIM (www.teisa.unican.es/gim), TEISA, University of Cantabria, Santander, Spain
V. Fernandez , GIM (www.teisa.unican.es/gim), TEISA, University of Cantabria, Santander, Spain
pp. 1361-1364

A low cost multi-standard near-optimal soft-output sphere decoder: Algorithm and architecture (Abstract)

Ozgun Paker , ST Ericsson, High Tech Campus 41, Eindhoven, The Netherlands
Sebastian Eckert , Blue Wonder Communications GmbH, Am Waldschlösschen 1,D-01099, Dresden, Germany
Andreas Bury , Blue Wonder Communications GmbH, Am Waldschlösschen 1,D-01099, Dresden, Germany
pp. 1402-1407

Embedded software testing: What kind of problem is this? (PDF)

Erika Cota , PPGC - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Po Box 15064, ZIP 91501-970 - Porto Alegre, Brazil
pp. 1486

Robust design of embedded systems (Abstract)

Martin Lukasiewycz , University of Erlangen-Nuremberg, Germany
Michael Glass , University of Erlangen-Nuremberg, Germany
Jurgen Teich , University of Erlangen-Nuremberg, Germany
pp. 1578-1583

Transmitting TLM transactions over analogue wire models (Abstract)

Stephan Schulz , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division, Zeunerstr. 38, 01069 Dresden, Germany
Jorg Becker , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division, Zeunerstr. 38, 01069 Dresden, Germany
Thomas Uhle , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division, Zeunerstr. 38, 01069 Dresden, Germany
Karsten Einwich , Fraunhofer Institute for Integrated Circuits IIS, Design Automation Division, Zeunerstr. 38, 01069 Dresden, Germany
Soren Sonntag , Lantiq Deutschland GmbH, Design Platforms & Services, Neubiberg, Germany
pp. 1608-1613

Analog circuit test based on a digital signature (Abstract)

A. Gomez , Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya, Av. Diagonal 647, planta 9, E-08028 Barcelona (Spain)
R. Sanahuja , Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya, Av. Diagonal 647, planta 9, E-08028 Barcelona (Spain)
L. Balado , Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya, Av. Diagonal 647, planta 9, E-08028 Barcelona (Spain)
J. Figueras , Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya, Av. Diagonal 647, planta 9, E-08028 Barcelona (Spain)
pp. 1641-1644

DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimation (Abstract)

Nabeel Iqbal , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
M.Adnan Siddique , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
Jorg Henkel , Karlsruhe Institute of Technology (KIT), Chair for Embedded Systems, Germany
pp. 1645-1648

An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusion (Abstract)

Muhammad Shafique , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
Bastian Molkenthin , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
Jorg Henkel , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
pp. 1713-1718

enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoder (Abstract)

Muhammad Shafique , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
Lars Bauer , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
Jorg Henkel , Karlsruhe Institute of Technology, Chair for Embedded Systems, Germany
pp. 1725-1730

Exploration of hardware sharing for image encoders (Abstract)

S. Lopez , Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria, SPAIN
R. Sarmiento , Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria, SPAIN
P.G. Potter , Department of Computing, Imperial College, London, UK
W. Luk , Department of Computing, Imperial College, London, UK
P.Y.K. Cheung , Department of Electrical and Electronic Engineering, Imperial College, London, UK
pp. 1737-1742

A new quaternary FPGA based on a voltage-mode multi-valued circuit (Abstract)

Cristiano Lazzari , INESC-ID, Lisbon, Portugal
Paulo Flores , INESC-ID / IST, TU Lisbon, Portugal
Jose Monteiro , INESC-ID / IST, TU Lisbon, Portugal
Luigi Carro , Institute of Informatics - UFRGS, Porto Alegre, Brazil
pp. 1797-1802
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