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Design, Automation & Test in Europe Conference & Exhibition (2004)
Paris, France
Feb. 16, 2004 to Feb. 20, 2004
ISSN: 1530-1591
ISBN: 0-7695-2085-5
pp: 10744
Ranga Vemuri , University of Cincinnati
Manish Handa , University of Cincinnati
ABSTRACT
In this paper, we present a fast algorithm for finding empty area on the FPGA surface with some rectangular tasks placed on it. We use a staircase datastructure to report the empty area in the form of a list of maximal empty rectangles. We model the FPGA surface using an innovative encoding scheme that improves runtime and reduces memory requirement of our algorithm.Worst-case time complexity of our algorithm is O(xy) where x is number of columns, y is number of rows and x.y is the total number of cells on the FPGA.
INDEX TERMS
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CITATION
Ranga Vemuri, Manish Handa, "A Fast Algorithm for Finding Maximal Empty Rectangles for Dynamic FPGA Placement", Design, Automation & Test in Europe Conference & Exhibition, vol. 01, no. , pp. 10744, 2004, doi:10.1109/DATE.2004.1268958
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