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Design, Automation & Test in Europe Conference & Exhibition (2003)
Munich, Germany
Mar. 3, 2003 to Mar. 7, 2003
ISSN: 1530-1591
ISBN: 0-7695-1870-2
pp: 11096
K. Fazel , Southern Methodist University
M. A. Thornton , Southern Methodist University
R. B. Reese , Mississippi State University
ABSTRACT
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock. One advantage of self-timed circuits is that throughput is based on average propagation delays and not worst-case delay. By being able to visualize the operation of a PL circuit, including the token flow, a designer gets a better understanding of what features of a design have the greatest impact on performance.
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CITATION

K. Fazel, R. B. Reese and M. A. Thornton, "PLFire: A Visualization Tool for Asynchronous Phased Logic Designs," Design, Automation & Test in Europe Conference & Exhibition(DATE), Munich, Germany, 2003, pp. 11096.
doi:10.1109/DATE.2003.10062
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