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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 810-813
Naoyuki Kawabe , Toshiba Corporation, Kawasaki, Japan
Kimiyoshi Usami , Toshiba Corporation, Kawasaki, Japan
Gang Qu , University of California, Los Angeles
Miodrag Potkonjak , University of California, Los Angeles
ABSTRACT
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build the "power data bank", which stores the power information of the built-in library functions and basic instructions. To estimate the average power of an embedded software on this core, we first get the execution information of the target software from program profiling/tracing tools. Then we evaluate the total energy consumption and execution time based on the "power data bank", and take their ratio as the average power. High efficiency is achieved because no power simulator is used once the "power data bank" is built. We apply this method to a commercial microprocessor core and get power estimates with an average error of 3%. With this method, microprocessor vendors can provide users the "power data bank" without releasing details of the core to help users get early power estimates and eventually guide power optimization.
INDEX TERMS
fault modeling, fault simulation, hard faults, test vector generation
CITATION
Naoyuki Kawabe, Kimiyoshi Usami, Gang Qu, Miodrag Potkonjak, "Function-Level Power Estimation Methodology for Microprocessors", Design Automation Conference, vol. 00, no. , pp. 810-813, 2000, doi:10.1109/DAC.2000.855425
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