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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 681-686
K. Mohanram , University of Texas, Austin
D. Moundanos , Fujitsu Labs of America, Sunnyvale, CA
I. Wegener , Universitaet Dortmund, Germany
Y. Lu , Carnegie Mellon University, Pittsburgh, PA
J. Jain , Fujitsu Labs of America, Sunnyvale, CA
We discuss an open problem in construction of Reduced Ordered Binary Decision Diagrams (ROBDDs) using composition, and prove that the worst case complexity of the construction is truly cubic. With this insight we show that the process of composition naturally leads to the construction of (even exponentially) compact partitioned-OBDDs (POBDDs) [12]. Our algorithm which incorporates dynamic partitioning, leads to the most general (and compact) form of POBDDs - graphs with multiple root variables. To show that our algorithm is robust and practical, we have analyzed some well known problems in Boolean function representation, verification and finite state machine analysis where our approach generates graphs which are even orders of magnitude smaller.
ASIC, clock frequency, clock speed, comparison, custom
K. Mohanram, D. Moundanos, I. Wegener, Y. Lu, J. Jain, "Analysis of Composition Complexity and how to Obtain Smaller Canonical Graphs", Design Automation Conference, vol. 00, no. , pp. 681-686, 2000, doi:10.1109/DAC.2000.855401
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