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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 661-666
Mahadevamurty Nemani , Intel Corporation, Santa Clara, CA
Vivek Tiwari , Intel Corporation, Santa Clara, CA
Datapath design is one of the most critical elements in the design of a high performance microprocessor. However datapath design is typically does manually, and is often custom style. This adversely impacts the overall productivity of the design team, as well as the quality of the design. In spite of this, very little automation has been available to the designers of high performance datapaths. In this paper we present a new "macro-driven" approach to the design of datapath circuits. Our approach, referred to as SMART (Smart Macro Design Advisor), is based on automatic generation of regular datapath components such as muxes, comparators, adders etc., which we refer to as datapath macros. The generated solution is based on designer provided constraints such as delay, load and slope, and is optimized for a designer provided cost metric such as power, area. Results on datapath circuits of a high-performance microprocessor show that this approach is very effective for both designer productivity as well as design quality.
ASIC, clock frequency, clock speed, comparison, custom
Mahadevamurty Nemani, Vivek Tiwari, "Macro-Driven Circuit Design Methodology for High-Performance Datapaths", Design Automation Conference, vol. 00, no. , pp. 661-666, 2000, doi:10.1109/DAC.2000.855396
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