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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 483-488
A. Sangiovanni-Vincentelli , Univ. of California at Berkeley
M. Di Natale , Universit? degli Studi di Pisa, Italy
F. Balarin , Cadence Berkeley Labs, Berkeley, CA
ABSTRACT
This paper addresses the problem of scheduling reactive real-time transactions (task groups) implementing a network of extended Finite State Machines communicating asynchronously. Task instances are activated in response to internal and/or external events. The objective is avoiding the loss of events exchanged by the tasks. This scheduling problem has many similarities with the conventional formulation of real-time problems and yet it differs enough to justify a rethinking of the assumptions and techniques used to solve the problem. Our iterative solution targets fixed priority systems and offers a priority assignment scheme together with a sufficiently tight worst-case analysis.
INDEX TERMS
co-simulation, configurable processor cores, coverage analysis, design verification, system-on-chip, test generation
CITATION
A. Sangiovanni-Vincentelli, M. Di Natale, F. Balarin, "Task Scheduling with RT Constraints", Design Automation Conference, vol. 00, no. , pp. 483-488, 2000, doi:10.1109/DAC.2000.855359
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