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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 464-467
Florin Balasa , University of Illinois, Chicago
Yingxin Pang , University of California, San Diego
Chung-Kuan Cheng , University of California, San Diego
Koen Lampaert , Conexant Systems Inc., Newport Beach, CA
ABSTRACT
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorplans, the O-tree representation is simpler, needs linear computation effort to generate a corresponding layout, and exhibits a smaller upper-bound of possible configurations. This paper addresses the problem of handling symmetry constraints in the context of the O-tree representation. This problem arises in analog placements, where symmetry is often used to match layout-induced parasitics and to balance thermal couplings in differential circuits. The good performance of our placement tool dealing with several analog designs taken from industry proves the effectiveness of our technique.
INDEX TERMS
co-simulation, configurable processor cores, coverage analysis, design verification, system-on-chip, test generation
CITATION
Florin Balasa, Yingxin Pang, Chung-Kuan Cheng, Koen Lampaert, "Block Placement with Symmetry Constraints Based on the O-Tree Non-Slicing Representation", Design Automation Conference, vol. 00, no. , pp. 464-467, 2000, doi:10.1109/DAC.2000.855355
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