Los Angeles, CA
June 5, 2000 to June 9, 2000
Joseph N. Kozhaya , University of Illinois, Urbana
Sani R. Nassif , IBM Austin Research Laboratory, Austin, TX
The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance limiting factors [1, 2, 3], then their analysis is important in order to (1) predict the performance and (2) improve the performance if necessary. Thus, there is a clear need for new efficient, in terms of both execution time and memory, techniques for power grid analysis.This paper discusses the modeling of power grids and proposes a new PDE-like multigrid method for the simulation of power grids. The proposed method is very efficient and suitable for both DC and transient simulation of power grids.
fault modeling, fault simulation, hard faults, test vector generation
Joseph N. Kozhaya, Sani R. Nassif, "Fast Power Grid Simulation", DAC, 2000, Design Automation Conference, Design Automation Conference 2000, pp. 156-161, doi:10.1109/DAC.2000.855295