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Design Automation Conference (2000)
Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 79-84
Andrew B. Kahng , UCLA Computer Science Dept., Los Angeles, CA
Egino Sarto , 3dfx Interactive, Inc., San Jose, CA
Sudhakar Muddu , Silicon Graphics, Inc., Mountain View, CA
We revisit a basic element of modern signal integrity analysis, the modeling of worst-case coupling capacitance effects within a switch factor (SF) based methodology. We show that the exact SF is a function of the ratio of slew times of both aggressor and victim interconnect voltages. Our main result is that 2C{c} (or, SF=2), where C{c} is the static coupling capacitance, is not a correct upper bound when calculating interconnect delay in presence of crosstalk: we show that for signals modeled as finite ramps the worst case is SF = 3. This has implications for almost all signal integrity methodologies, e.g., window-based approaches that iteratively determine worst-case coupling effects. We have tested our result in a worst-case delay analysis methodology by transforming the coupled RC network to an RC network where each coupling capacitance C is replaced by a capacitance 3C to ground. SPICE simulation confirms the accuracy of worst-case delay estimates produced using SF = 3. Delay with SF = 3 can still be underestimating because of exponential waveforms.
Andrew B. Kahng, Egino Sarto, Sudhakar Muddu, "On Switch Factor Based Analysis of Coupled RC Interconnects", Design Automation Conference, vol. 00, no. , pp. 79-84, 2000, doi:10.1109/DAC.2000.855281
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