The Community for Technology Leaders
30th ACM/IEEE Design Automation Conference (1993)
Dallas, TX, USA
June 14, 14 to June 18, 1993
ISSN: 0738-100X
ISBN: 0-89791-577-1
TABLE OF CONTENTS

Reviewers (PDF)

pp. ix,x,xi,xii,xiii,xiv

Panel: What Is the Next Big Productivity Boost for Designers? (PDF)

K. Keutzer , Synopsys, Inc., Mountain View, CA
pp. 141

Panel: Logic Emulation: A Niche or a Future Standard for Design Verification? (PDF)

J. Rose , Univ. of Toronto, Toronto, Ontario, Canada
pp. 164

Partial Scan with Retiming (Abstract)

pp. 249-254

Information Modelling of EDIF (Abstract)

pp. 278-283

Panel: Life Expectancy of Standards (PDF)

S.R. Pollock , SRP Associates, Sunnyvale, CA
pp. 284

Panel: Are EDA Platform Preferences About to Shift (PDF)

W.S. Johnson , Sun Microsystems Computer Corp., Mountain View, CA
pp. 482

Panel: Multi-vendor Tool Integration Experiences (PDF)

R. Collett , Collett International, Inc., Santa Clara, CA
pp. 617

An Information Model of Time (Abstract)

pp. 668-672

The State of VHDL in Russia (Abstract)

pp. 709-711

Panel: The Key to EDA Results: Component & Library Management (PDF)

R. Wadhwani , Aspect Development, Inc., Los Altos, CA
pp. 766
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