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Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 720-723
Yen , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
Ghanta , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
Du , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
ABSTRACT
Existing algorithms for timing analysis have difficulties when dealing with large designs. A novel algorithm for timing analysis is proposed that enumerates all the paths with delay greater than a given threshold. The execution time of the proposed algorithm is proportional to the number of paths generated, so it is suitable for large designs.
INDEX TERMS
timing verification, logic design, path selection algorithm, timing analysis, large designs, delay, execution time
CITATION

Ghanta, Du and Yen, "A path selection algorithm for timing analysis," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 720-723.
doi:10.1109/DAC.1988.14850
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