The Community for Technology Leaders
Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 712-715
Hansen , MIPS Comput. Syst. Inc., Sunnyvale, CA, USA
ABSTRACT
A behavioral and logic simulation system which uses extensive optimization and compilation techniques to obtain high performance is described. It incorporates data-flow analysis to optimize the evaluation of unordered assignment statements that define a hardware structure, and to extract clocking rules. An integral code generator produces efficient assembly code for three different machines, and an associated run-time library provides a flexible interactive debugging environment.
INDEX TERMS
Terse, compilation, logic simulation system, optimization, data-flow analysis, unordered assignment statements, hardware structure, integral code generator, assembly code, interactive debugging environment
CITATION

Hansen, "Hardware logic simulation by compilation," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 712-715.
doi:10.1109/DAC.1988.14848
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