Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
Hansen , MIPS Comput. Syst. Inc., Sunnyvale, CA, USA
A behavioral and logic simulation system which uses extensive optimization and compilation techniques to obtain high performance is described. It incorporates data-flow analysis to optimize the evaluation of unordered assignment statements that define a hardware structure, and to extract clocking rules. An integral code generator produces efficient assembly code for three different machines, and an associated run-time library provides a flexible interactive debugging environment.
Terse, compilation, logic simulation system, optimization, data-flow analysis, unordered assignment statements, hardware structure, integral code generator, assembly code, interactive debugging environment
Hansen, "Hardware logic simulation by compilation," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 712-715.