Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
Bergstraesser , Siemens AG, Munich, West Germany
Gessner , Siemens AG, Munich, West Germany
Hafner , Siemens AG, Munich, West Germany
Wallstab , Siemens AG, Munich, West Germany
A design environment supporting processor synthesis in data-path style is presented. The programming model of a processor described in Common Lisp is transformed into a hardware structure by tools integrated into this environment. The generation of alternative designs is supported by the interactive graphical manipulation of behaviour and hardware structure representations and their correspondences. The synthesis procedure is explained using an example.
behaviour structure-representation, CAD, logic design, SMART, VLSI chips, processor architecture, design environment, processor synthesis, data-path style, programming model, Common Lisp, hardware structure, interactive graphical manipulation
Gessner, Wallstab, Bergstraesser and Hafner, "SMART: tools and methods for synthesis of VLSI chips with processor architecture," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 654-657.