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Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 650-653
Hou , Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
Owens , Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
Irwin , Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
ABSTRACT
A tool for synthesizing systolic systems is introduced. Given a hierarchical specification of the computations to be performed and hints as to how, this tool generates an analysis of the hardware required to the computations. The computations are specified as directed acyclic graphs, and the hints provide the temporal and topological relationships of each computation. The systolic system is synthesized by traversing the graph and marking each computation with a processor name and a time stamp. Its output can subsequently be fed to the remaining tools in the tool set to generate a VLSI fabrication description of the systolic system.
INDEX TERMS
user interface, layout design, logic design, CAD, DECOMPOSER, synthesizer, systolic systems, hierarchical specification, hints, directed acyclic graphs, topological relationships, VLSI fabrication description
CITATION

Hou, Owens and Irwin, "DECOMPOSER: a synthesizer for systolic systems," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 650-653.
doi:10.1109/DAC.1988.14835
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