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Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 645
Ogawa , Hitachi Ltd., Tokyo, Japan
Terai , Hitachi Ltd., Tokyo, Japan
Kozawa , Hitachi Ltd., Tokyo, Japan
ABSTRACT
Conventional automatic layout systems for MOS or bipolar devices systems cannot deal with certain features, e.g. signal serialization, in serial routing devices such as Josephson devices. The authors define layout requirements and present new automatic layout procedures for such devices. These procedures are based on it subnet partitioning. They can be applied to the hierarchical design of both masterslice and custom logic LSIs. Experiments using four-bit-full-adder circuits confirm their feasibility.
INDEX TERMS
MOS devices, CAD, logic design, serial routing devices, bipolar devices, signal serialization, Josephson devices, automatic layout procedures, subnet partitioning, hierarchical design, masterslice, custom logic LSIs
CITATION

Terai, Ogawa and Kozawa, "Automatic layout procedures for serial routing devices," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 645.
doi:10.1109/DAC.1988.14833
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