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Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 638-641
Jabri , Sch. of Electr. Eng., Sydney Univ., NSW, Australia
ABSTRACT
Rectangular dualisation is used to generate rectangular topologies in top-down floorplanning of integrated circuits. The author presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit into one suitable for rectangular dualisation. The algorithm uses efficient techniques in graph processing, such as planar embedding, and introduces a novel procedure to transform a tree of biconnected subgraphs into a block neighborhood graph that is a path.
INDEX TERMS
custom IC, tree transformation, layout design, CAD, rectangular dualisation, rectangular topologies, top-down floorplanning, integrated circuits, planar embedding, biconnected subgraphs, block neighborhood graph
CITATION

Jabri, "Automatic building of graphs for rectangular dualisation (IC floorplanning)," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 638-641.
doi:10.1109/DAC.1988.14832
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