The Community for Technology Leaders
Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 501-505
Choi , Stanford Univ., CA, USA
Hwang , Stanford Univ., CA, USA
Blank , Stanford Univ., CA, USA
The authors present an incremental-in-time algorithm for incremental simulation of digital circuits. In contrast to the incremental-in-space algorithm, which pessimistically resimulates the circuit components that could be affected by design changes throughout the simulation time frames, the incremental-in-time algorithm resimulates a circuit component only for the simulation time frames when its inputs or internal state variable make different state transitions from the previous simulation run. It maximally utilizes the past history, thereby reducing the number of component evaluations to a minimum. Experimental results obtained for several practical circuits show speedups up to 30 times faster than conventional event-driven stimulation.
digital simulation, incremental-in-time algorithm, digital circuits, component evaluations

Hwang, Choi and Blank, "Incremental-in-time algorithm for digital simulation," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 501-505.
87 ms
(Ver 3.3 (11022016))