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Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 154-159
Wallace , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Sequin , Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
ABSTRACT
A discussion is presented of implementation and extensions of an abstract timing verifier, and in particular, several novel operations and a novel algorithm for analyzing critical paths that extend through transparent latches and stretch over multiple machine cycles. By placing events in different reference frames that can be translated relative to one another, the program can be used either to check a design for timing errors when the clock schedule is fixed and known, or to derive spacing constraints between clock edges when only the relative ordering of the clock edges is known. All algorithms are designed to operate on a wide variety of representation of time and delay.
INDEX TERMS
timing verification, abstract timing verifier, implementation, extensions, operations, algorithm for analyzing critical paths, transparent latches, multiple machine cycles, different reference frames, timing errors, clock schedule, derive spacing constraints
CITATION

Wallace and Sequin, "ATV: an abstract timing verifier," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 154-159.
doi:10.1109/DAC.1988.14751
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