Design Automation Conference (1988)

Anaheim, CA, USA

June 12, 1988 to June 15, 1988

ISBN: 0-8186-0864-1

pp: 102-107

Baer , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

Liem , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

McMurchie , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

Nottrott , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

Snyder , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

Winder , Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA

ABSTRACT

A declaration hierarchical notation is introduced that allows the parametric representation of entire families of VLSI circuits. Layout, schematic diagrams and network structure are all accommodated by the notation in a way that emphasizes common elements. The notation is the basic of a structured environment for developing design generators as well as capturing design expertise.

INDEX TERMS

layout notation, declaration hierarchical notation, parametric representation, entire families of VLSI circuits, schematic diagrams, network structure, emphasizes common elements, structured environment, developing design generators, capturing design expertise

CITATION

Winder, Baer, Snyder, Nottrott, Liem and McMurchie, "A notation for describing multiple views of VLSI circuits,"

*Design Automation Conference(DAC)*, Anaheim, CA, USA, 1988, pp. 102-107.

doi:10.1109/DAC.1988.14743

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