The Community for Technology Leaders
Design Automation Conference (1988)
Anaheim, CA, USA
June 12, 1988 to June 15, 1988
ISBN: 0-8186-0864-1
pp: 0_1-
channel routing, gate connectivity verification, circuit layout CAD, conference 1988, design for testability, VHDL, floorplanning, area estimation, automatic test generation, hardware design languages, physical design acceleration, parallel simulation, global routing, mega-simulation accelerators, Xerox PARC design automation system, engineering information databases, application-specific simulation, placement algorithms, high level synthesis, distributed databases, analog circuits, layout compaction, register-transfer-level synthesis, logic synthesis, transistor-level-layout, physical design verification, incremental techniques, logic simulation, gate extraction

"25th ACM/IEEE Design Automation Conference. Proceedings 1988 (Cat. No.88CH2540-3)," Design Automation Conference(DAC), Anaheim, CA, USA, 1988, pp. 0_1-.
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