Computer Science and Information Engineering, World Congress on (2009)
Los Angeles, California USA
Mar. 31, 2009 to Apr. 2, 2009
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CSIE.2009.245
Dynamic branch prediction in the high-perfomance processors was a specific instance of a general Time Series prediction problem that occurred in many areas of science. In contrast, most branch prediction research focused on Dynamic two-level branch prediction techniques, a very specific solution to the branch prediction problem. In this paper, we introduced a kind architecture of loop detector and bcache pipeline restorer which were based on GAs dynamic two-level branch prediction. The processors which brought the extend architecture can reduce redundancy decode of program that contained lots of loop branch instructions and reduce the resume time of stall pipeline by the miss prediction.
Branch Prediction, Dynamic two-level branch prediction, b-cache pipeline restorer, Spect95, loop detector
J. Li, C. Men and P. Jiao, "The New Kind Structure Design and Research of Loop and b-Cache Based on GAs Branch Prediction," 2009 WRI World Congress on Computer Science and Information Engineering, CSIE(CSIE), Los Angeles, CA, 2009, pp. 780-785.