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Computer Science and Information Engineering, World Congress on (2009)
Los Angeles, California USA
Mar. 31, 2009 to Apr. 2, 2009
ISBN: 978-0-7695-3507-4
pp: 536-540
A hardware design of a configurable and extensible processor named Tcore, which is based on transport triggered architecture (TTA), is presented in this paper. Due to its flexibility, the Tcore can be used as an application specific processor, especially as a coprocessor for different DSP applications. We have configured Tcore to an instruction level parallel processor to support the application of MP3 IMDCT in a SoC and have been fully verified on FPGA. The results show the advantage of using this configurable processor in terms of performance in computation, flexibility in application, limited effort in design and reduction on silicon area.
SoC, Transport Triggered Architecture, configurable and extensible processor, MP3, IMDCT

S. Wang, J. Wei, Y. Yao, W. Guo and Z. Shi, "Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture," 2009 WRI World Congress on Computer Science and Information Engineering, CSIE(CSIE), Los Angeles, CA, 2009, pp. 536-540.
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